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From: Andrew Jones <ajones@ventanamicro.com>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	alistair.francis@wdc.com,  bmeng@tinylab.org,
	liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com,
	 palmer@rivosinc.com
Subject: Re: [PATCH 08/16] target/riscv: handle mvendorid/marchid/mimpid for KVM CPUs
Date: Tue, 6 Jun 2023 17:51:51 +0200	[thread overview]
Message-ID: <20230606-233d35581a6a5b7be768cfc0@orel> (raw)
In-Reply-To: <20230530194623.272652-9-dbarboza@ventanamicro.com>

On Tue, May 30, 2023 at 04:46:15PM -0300, Daniel Henrique Barboza wrote:
> After changing user validation for mvendorid/marchid/mimpid to guarantee
> that the value is validated on user input time, coupled with the work in
> fetching KVM default values for them by using a scratch CPU, we're
> certain that the values in cpu->cfg.(mvendorid|marchid|mimpid) are
> already good to be written back to KVM.
> 
> There's no need to write the values back for 'host' type CPUs since the
> values can't be changed, so let's do that just for generic CPUs.
> 
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
>  target/riscv/kvm.c | 31 +++++++++++++++++++++++++++++++
>  1 file changed, 31 insertions(+)
> 
> diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
> index cd2974c663..602727cdfd 100644
> --- a/target/riscv/kvm.c
> +++ b/target/riscv/kvm.c
> @@ -495,6 +495,33 @@ void kvm_arch_init_irq_routing(KVMState *s)
>  {
>  }
>  
> +static int kvm_vcpu_set_machine_ids(RISCVCPU *cpu, CPUState *cs)
> +{
> +    CPURISCVState *env = &cpu->env;
> +    uint64_t id;
> +    int ret;
> +
> +    id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
> +                          KVM_REG_RISCV_CONFIG_REG(mvendorid));
> +    ret = kvm_set_one_reg(cs, id, &cpu->cfg.mvendorid);
> +    if (ret != 0) {
> +        return ret;
> +    }
> +
> +    id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
> +                          KVM_REG_RISCV_CONFIG_REG(marchid));
> +    ret = kvm_set_one_reg(cs, id, &cpu->cfg.marchid);
> +    if (ret != 0) {
> +        return ret;
> +    }
> +
> +    id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG,
> +                          KVM_REG_RISCV_CONFIG_REG(mimpid));
> +    ret = kvm_set_one_reg(cs, id, &cpu->cfg.mimpid);
> +
> +    return ret;
> +}
> +
>  int kvm_arch_init_vcpu(CPUState *cs)
>  {
>      int ret = 0;
> @@ -513,6 +540,10 @@ int kvm_arch_init_vcpu(CPUState *cs)
>      }
>      env->misa_ext = isa;
>  
> +    if (!object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_CPU_HOST)) {
> +        ret = kvm_vcpu_set_machine_ids(cpu, cs);
> +    }
> +
>      return ret;
>  }
>  
> -- 
> 2.40.1
> 
>

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>


  reply	other threads:[~2023-06-06 15:52 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-30 19:46 [PATCH 00/16] target/riscv, KVM: fixes and enhancements Daniel Henrique Barboza
2023-05-30 19:46 ` [PATCH 01/16] target/riscv: skip features setup for KVM CPUs Daniel Henrique Barboza
2023-06-02  4:17   ` Alistair Francis
2023-06-02 14:52   ` Andrew Jones
2023-05-30 19:46 ` [PATCH 02/16] hw/riscv/virt.c: skip 'mmu-type' FDT if satp mode not set Daniel Henrique Barboza
2023-06-06 13:13   ` Andrew Jones
2023-06-06 20:07     ` Daniel Henrique Barboza
2023-06-12  3:53   ` Alistair Francis
2023-05-30 19:46 ` [PATCH 03/16] target/riscv/cpu.c: restrict 'mvendorid' value Daniel Henrique Barboza
2023-06-06 13:19   ` Andrew Jones
2023-06-06 20:06     ` Daniel Henrique Barboza
2023-06-12  3:56   ` Alistair Francis
2023-06-12 18:52     ` Daniel Henrique Barboza
2023-06-13  6:46       ` Alistair Francis
2023-05-30 19:46 ` [PATCH 04/16] target/riscv/cpu.c: restrict 'mimpid' value Daniel Henrique Barboza
2023-06-06 15:31   ` Andrew Jones
2023-05-30 19:46 ` [PATCH 05/16] target/riscv/cpu.c: restrict 'marchid' value Daniel Henrique Barboza
2023-06-06 15:33   ` Andrew Jones
2023-05-30 19:46 ` [PATCH 06/16] target/riscv: use KVM scratch CPUs to init KVM properties Daniel Henrique Barboza
2023-06-06 15:46   ` Andrew Jones
2023-06-12  3:59   ` Alistair Francis
2023-05-30 19:46 ` [PATCH 07/16] target/riscv: read marchid/mimpid in kvm_riscv_init_machine_ids() Daniel Henrique Barboza
2023-06-06 15:47   ` Andrew Jones
2023-06-12  4:05   ` Alistair Francis
2023-05-30 19:46 ` [PATCH 08/16] target/riscv: handle mvendorid/marchid/mimpid for KVM CPUs Daniel Henrique Barboza
2023-06-06 15:51   ` Andrew Jones [this message]
2023-05-30 19:46 ` [PATCH 09/16] linux-headers: Update to v6.4-rc1 Daniel Henrique Barboza
2023-05-30 19:46 ` [PATCH 10/16] target/riscv/kvm.c: init 'misa_ext_mask' with scratch CPU Daniel Henrique Barboza
2023-06-06 15:54   ` Andrew Jones
2023-05-30 19:46 ` [PATCH 11/16] target/riscv: add KVM specific MISA properties Daniel Henrique Barboza
2023-06-07 11:33   ` Andrew Jones
2023-05-30 19:46 ` [PATCH 12/16] target/riscv/kvm.c: update KVM MISA bits Daniel Henrique Barboza
2023-06-07 12:05   ` Andrew Jones
2023-05-30 19:46 ` [PATCH 13/16] target/riscv/kvm.c: add multi-letter extension KVM properties Daniel Henrique Barboza
2023-06-07 11:48   ` Andrew Jones
2023-06-07 19:59     ` Daniel Henrique Barboza
2023-06-08  6:02       ` Andrew Jones
2023-06-12 19:24     ` Daniel Henrique Barboza
2023-05-30 19:46 ` [PATCH 14/16] target/riscv: adapt 'riscv_isa_string' for KVM Daniel Henrique Barboza
2023-06-07 12:21   ` Andrew Jones
2023-06-13 10:29     ` Daniel Henrique Barboza
2023-06-13 18:19       ` Daniel Henrique Barboza
2023-05-30 19:46 ` [PATCH 15/16] target/riscv: update multi-letter extension KVM properties Daniel Henrique Barboza
2023-06-07 12:30   ` Andrew Jones
2023-05-30 19:46 ` [PATCH 16/16] target/riscv/kvm.c: read/write (cbom|cboz)_blocksize in KVM Daniel Henrique Barboza
2023-06-07 13:01   ` Andrew Jones
2023-06-07 20:37     ` Daniel Henrique Barboza
2023-06-08  6:39       ` Andrew Jones

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