From: Andrew Jones <ajones@ventanamicro.com>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
alistair.francis@wdc.com, bmeng@tinylab.org,
liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com,
palmer@rivosinc.com
Subject: Re: [PATCH 13/16] target/riscv/kvm.c: add multi-letter extension KVM properties
Date: Thu, 8 Jun 2023 08:02:44 +0200 [thread overview]
Message-ID: <20230608-8a2abef07a078c1eae49cfcd@orel> (raw)
In-Reply-To: <fb74c3a0-9762-92c2-4a1c-9544af822c5a@ventanamicro.com>
On Wed, Jun 07, 2023 at 04:59:02PM -0300, Daniel Henrique Barboza wrote:
>
>
> On 6/7/23 08:48, Andrew Jones wrote:
> > On Tue, May 30, 2023 at 04:46:20PM -0300, Daniel Henrique Barboza wrote:
> > > Let's add KVM user properties for the multi-letter extensions that KVM
> > > currently supports: zicbom, zicboz, zihintpause, zbb, ssaia, sstc,
> > > svinval and svpbmt.
> > >
> > > As with the recently added MISA properties we're also going to add a
> > > 'user_set' flag in each of them. The flag will be set only if the user
> > > chose an option that's different from the host and will require extra
> > > handling from the KVM driver.
> > >
> > > However, multi-letter CPUs have more cases to cover than MISA
> > > extensions, so we're adding an extra 'supported' flag as well. This flag
> > > will reflect if a given extension is supported by KVM, i.e. KVM knows
> > > how to handle it. This is determined during KVM extension discovery in
> > > kvm_riscv_init_multiext_cfg(), where we test for EINVAL errors. Any
> > > other error different from EINVAL will cause an abort.
> >
> > I wish that was ENOENT, but I suppose that ship sailed.
> >
> > >
> > > The 'supported' flag will then be used later on to give an exception for
> > > users that are disabling multi-letter extensions that are unknown to
> > > KVM.
> > >
> > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> > > ---
> > > target/riscv/kvm.c | 136 +++++++++++++++++++++++++++++++++++++++++++++
> > > 1 file changed, 136 insertions(+)
> > >
> > > diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
> > > index bb1dafe263..b4193a10d8 100644
> > > --- a/target/riscv/kvm.c
> > > +++ b/target/riscv/kvm.c
> > > @@ -202,6 +202,99 @@ static void kvm_riscv_update_cpu_misa_ext(RISCVCPU *cpu, CPUState *cs)
> > > }
> > > }
> > > +typedef struct RISCVCPUMultiExtConfig {
> > > + const char *name;
> >
> > No description? I'd prefer we use the same cfg struct for single-letter
> > and multi-letter extensions. We can use a union to overlap cpu_cfg_offset
> > and misa_bit.
>
> multi-letter extensions don't have a 'description' field in TCG. Nothing
> prevents us from adding for KVM though.
KVM can wait for descriptions until after adding them to TCG, and then,
hopefully, figuring out how to share them with KVM.
Thanks,
drew
next prev parent reply other threads:[~2023-06-08 6:03 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-30 19:46 [PATCH 00/16] target/riscv, KVM: fixes and enhancements Daniel Henrique Barboza
2023-05-30 19:46 ` [PATCH 01/16] target/riscv: skip features setup for KVM CPUs Daniel Henrique Barboza
2023-06-02 4:17 ` Alistair Francis
2023-06-02 14:52 ` Andrew Jones
2023-05-30 19:46 ` [PATCH 02/16] hw/riscv/virt.c: skip 'mmu-type' FDT if satp mode not set Daniel Henrique Barboza
2023-06-06 13:13 ` Andrew Jones
2023-06-06 20:07 ` Daniel Henrique Barboza
2023-06-12 3:53 ` Alistair Francis
2023-05-30 19:46 ` [PATCH 03/16] target/riscv/cpu.c: restrict 'mvendorid' value Daniel Henrique Barboza
2023-06-06 13:19 ` Andrew Jones
2023-06-06 20:06 ` Daniel Henrique Barboza
2023-06-12 3:56 ` Alistair Francis
2023-06-12 18:52 ` Daniel Henrique Barboza
2023-06-13 6:46 ` Alistair Francis
2023-05-30 19:46 ` [PATCH 04/16] target/riscv/cpu.c: restrict 'mimpid' value Daniel Henrique Barboza
2023-06-06 15:31 ` Andrew Jones
2023-05-30 19:46 ` [PATCH 05/16] target/riscv/cpu.c: restrict 'marchid' value Daniel Henrique Barboza
2023-06-06 15:33 ` Andrew Jones
2023-05-30 19:46 ` [PATCH 06/16] target/riscv: use KVM scratch CPUs to init KVM properties Daniel Henrique Barboza
2023-06-06 15:46 ` Andrew Jones
2023-06-12 3:59 ` Alistair Francis
2023-05-30 19:46 ` [PATCH 07/16] target/riscv: read marchid/mimpid in kvm_riscv_init_machine_ids() Daniel Henrique Barboza
2023-06-06 15:47 ` Andrew Jones
2023-06-12 4:05 ` Alistair Francis
2023-05-30 19:46 ` [PATCH 08/16] target/riscv: handle mvendorid/marchid/mimpid for KVM CPUs Daniel Henrique Barboza
2023-06-06 15:51 ` Andrew Jones
2023-05-30 19:46 ` [PATCH 09/16] linux-headers: Update to v6.4-rc1 Daniel Henrique Barboza
2023-05-30 19:46 ` [PATCH 10/16] target/riscv/kvm.c: init 'misa_ext_mask' with scratch CPU Daniel Henrique Barboza
2023-06-06 15:54 ` Andrew Jones
2023-05-30 19:46 ` [PATCH 11/16] target/riscv: add KVM specific MISA properties Daniel Henrique Barboza
2023-06-07 11:33 ` Andrew Jones
2023-05-30 19:46 ` [PATCH 12/16] target/riscv/kvm.c: update KVM MISA bits Daniel Henrique Barboza
2023-06-07 12:05 ` Andrew Jones
2023-05-30 19:46 ` [PATCH 13/16] target/riscv/kvm.c: add multi-letter extension KVM properties Daniel Henrique Barboza
2023-06-07 11:48 ` Andrew Jones
2023-06-07 19:59 ` Daniel Henrique Barboza
2023-06-08 6:02 ` Andrew Jones [this message]
2023-06-12 19:24 ` Daniel Henrique Barboza
2023-05-30 19:46 ` [PATCH 14/16] target/riscv: adapt 'riscv_isa_string' for KVM Daniel Henrique Barboza
2023-06-07 12:21 ` Andrew Jones
2023-06-13 10:29 ` Daniel Henrique Barboza
2023-06-13 18:19 ` Daniel Henrique Barboza
2023-05-30 19:46 ` [PATCH 15/16] target/riscv: update multi-letter extension KVM properties Daniel Henrique Barboza
2023-06-07 12:30 ` Andrew Jones
2023-05-30 19:46 ` [PATCH 16/16] target/riscv/kvm.c: read/write (cbom|cboz)_blocksize in KVM Daniel Henrique Barboza
2023-06-07 13:01 ` Andrew Jones
2023-06-07 20:37 ` Daniel Henrique Barboza
2023-06-08 6:39 ` Andrew Jones
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