qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com,
	peter.maydell@linaro.org, richard.henderson@linaro.org,
	"BALATON Zoltan" <balaton@eik.bme.hu>,
	"Cédric Le Goater" <clg@kaod.org>
Subject: [PULL 14/29] target/ppc: Remove "ext" parameter of ppcemb_tlb_check()
Date: Sat, 10 Jun 2023 10:31:17 -0300	[thread overview]
Message-ID: <20230610133132.290703-15-danielhb413@gmail.com> (raw)
In-Reply-To: <20230610133132.290703-1-danielhb413@gmail.com>

From: BALATON Zoltan <balaton@eik.bme.hu>

This is only used by one caller so simplify function by removing this
parameter and move the operation to the single place where it's used.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <b21f11ae20e8a8c2e8b5d943f2bff12b5356005a.1685448535.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
 target/ppc/cpu.h        |  3 +--
 target/ppc/mmu_common.c | 21 +++++++++------------
 target/ppc/mmu_helper.c |  2 +-
 3 files changed, 11 insertions(+), 15 deletions(-)

diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 10c4ffa148..557e02e697 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1429,8 +1429,7 @@ int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t *tlb,
                             uint32_t pid);
 int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
                             hwaddr *raddrp,
-                            target_ulong address, uint32_t pid, int ext,
-                            int i);
+                            target_ulong address, uint32_t pid, int i);
 hwaddr booke206_tlb_to_page_size(CPUPPCState *env,
                                         ppcmas_tlb_t *tlb);
 #endif
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 7235a4befe..21a353c51a 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -491,8 +491,7 @@ static int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx,
 /* Generic TLB check function for embedded PowerPC implementations */
 int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
                             hwaddr *raddrp,
-                            target_ulong address, uint32_t pid, int ext,
-                            int i)
+                            target_ulong address, uint32_t pid, int i)
 {
     target_ulong mask;
 
@@ -514,11 +513,6 @@ int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
         return -1;
     }
     *raddrp = (tlb->RPN & mask) | (address & ~mask);
-    if (ext) {
-        /* Extend the physical address to 36 bits */
-        *raddrp |= (uint64_t)(tlb->RPN & 0xF) << 32;
-    }
-
     return 0;
 }
 
@@ -536,7 +530,7 @@ static int mmu40x_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
     for (i = 0; i < env->nb_tlb; i++) {
         tlb = &env->tlb.tlbe[i];
         if (ppcemb_tlb_check(env, tlb, &raddr, address,
-                             env->spr[SPR_40x_PID], 0, i) < 0) {
+                             env->spr[SPR_40x_PID], i) < 0) {
             continue;
         }
         zsel = (tlb->attr >> 4) & 0xF;
@@ -598,20 +592,23 @@ static int mmubooke_check_tlb(CPUPPCState *env, ppcemb_tlb_t *tlb,
     int prot2;
 
     if (ppcemb_tlb_check(env, tlb, raddr, address,
-                         env->spr[SPR_BOOKE_PID],
-                         !env->nb_pids, i) >= 0) {
+                         env->spr[SPR_BOOKE_PID], i) >= 0) {
+        if (!env->nb_pids) {
+            /* Extend the physical address to 36 bits */
+            *raddr |= (uint64_t)(tlb->RPN & 0xF) << 32;
+        }
         goto found_tlb;
     }
 
     if (env->spr[SPR_BOOKE_PID1] &&
         ppcemb_tlb_check(env, tlb, raddr, address,
-                         env->spr[SPR_BOOKE_PID1], 0, i) >= 0) {
+                         env->spr[SPR_BOOKE_PID1], i) >= 0) {
         goto found_tlb;
     }
 
     if (env->spr[SPR_BOOKE_PID2] &&
         ppcemb_tlb_check(env, tlb, raddr, address,
-                         env->spr[SPR_BOOKE_PID2], 0, i) >= 0) {
+                         env->spr[SPR_BOOKE_PID2], i) >= 0) {
         goto found_tlb;
     }
 
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index c0c71a68ff..e7275eaec1 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -124,7 +124,7 @@ static int ppcemb_tlb_search(CPUPPCState *env, target_ulong address,
     ret = -1;
     for (i = 0; i < env->nb_tlb; i++) {
         tlb = &env->tlb.tlbe[i];
-        if (ppcemb_tlb_check(env, tlb, &raddr, address, pid, 0, i) == 0) {
+        if (ppcemb_tlb_check(env, tlb, &raddr, address, pid, i) == 0) {
             ret = i;
             break;
         }
-- 
2.40.1



  parent reply	other threads:[~2023-06-10 13:32 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-10 13:31 [PULL 00/29] ppc queue Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 01/29] pnv/xive2: Add definition for TCTXT Config register Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 02/29] pnv/xive2: Add definition for the ESB cache configuration register Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 03/29] pnv/xive2: Allow writes to the Physical Thread Enable registers Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 04/29] pnv/xive2: Introduce macros to manipulate TIMA addresses Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 05/29] pnv/xive2: Handle TIMA access through all ports Daniel Henrique Barboza
2023-06-20 10:45   ` Peter Maydell
2023-06-20 11:20     ` Cédric Le Goater
2023-06-20 14:31       ` Frederic Barrat
2023-06-20 14:57         ` Cédric Le Goater
2023-06-21  7:18         ` Cédric Le Goater
2023-06-21 15:18           ` Frederic Barrat
2023-06-21 16:59             ` Cédric Le Goater
2023-06-10 13:31 ` [PULL 06/29] target/ppc: Fix nested-hv HEAI delivery Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 07/29] pnv/xive2: Quiet down some error messages Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 08/29] target/ppc: Fix PMU hflags calculation Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 09/29] target/ppc: PMU do not clear MMCR0[FCECE] on performance monitor alert Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 10/29] target/ppc: Fix msgclrp interrupt type Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 11/29] target/ppc: Support directed privileged doorbell interrupt (SDOOR) Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 12/29] target/ppc: PMU implement PERFM interrupts Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 13/29] target/ppc: Remove single use function Daniel Henrique Barboza
2023-06-10 13:31 ` Daniel Henrique Barboza [this message]
2023-06-10 13:31 ` [PULL 15/29] target/ppc: Move ppcemb_tlb_search() to mmu_common.c Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 16/29] target/ppc: Remove some unneded line breaks Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 17/29] target/ppc: Simplify ppcemb_tlb_search() Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 18/29] target/ppc: Change ppcemb_tlb_check() to return bool Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 19/29] target/ppc: Eliminate goto in mmubooke_check_tlb() Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 20/29] target/ppc: Fix lqarx to set cpu_reserve Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 21/29] target/ppc: Ensure stcx size matches larx Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 22/29] target/ppc: Remove larx/stcx. memory barrier semantics Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 23/29] target/ppc: Rework store conditional to avoid branch Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 24/29] target/ppc: Fix decrementer time underflow and infinite timer loop Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 25/29] target/ppc: Decrementer fix BookE semantics Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 26/29] hw/ppc/openpic: Do not open-code ROUND_UP() macro Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 27/29] tests/avocado/tuxrun_baselines: Fix ppc64 tests for binaries without slirp Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 28/29] target/ppc: Implement gathering irq statistics Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 29/29] hw/ppc/Kconfig: MAC_NEWWORLD should always select USB_OHCI_PCI Daniel Henrique Barboza
2023-06-10 15:44 ` [PULL 00/29] ppc queue Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230610133132.290703-15-danielhb413@gmail.com \
    --to=danielhb413@gmail.com \
    --cc=balaton@eik.bme.hu \
    --cc=clg@kaod.org \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).