From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com,
peter.maydell@linaro.org, richard.henderson@linaro.org,
"BALATON Zoltan" <balaton@eik.bme.hu>,
"Cédric Le Goater" <clg@kaod.org>
Subject: [PULL 18/29] target/ppc: Change ppcemb_tlb_check() to return bool
Date: Sat, 10 Jun 2023 10:31:21 -0300 [thread overview]
Message-ID: <20230610133132.290703-19-danielhb413@gmail.com> (raw)
In-Reply-To: <20230610133132.290703-1-danielhb413@gmail.com>
From: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <bacd1bcbe99c07930c29a9815915da9ac75f6920.1685448535.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
target/ppc/mmu_common.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index ff7f987546..bd7d7d5257 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -489,15 +489,15 @@ static int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx,
}
/* Generic TLB check function for embedded PowerPC implementations */
-static int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
- hwaddr *raddrp,
- target_ulong address, uint32_t pid, int i)
+static bool ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
+ hwaddr *raddrp,
+ target_ulong address, uint32_t pid, int i)
{
target_ulong mask;
/* Check valid flag */
if (!(tlb->prot & PAGE_VALID)) {
- return -1;
+ return false;
}
mask = ~(tlb->size - 1);
qemu_log_mask(CPU_LOG_MMU, "%s: TLB %d address " TARGET_FMT_lx
@@ -506,14 +506,14 @@ static int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
mask, (uint32_t)tlb->PID, tlb->prot);
/* Check PID */
if (tlb->PID != 0 && tlb->PID != pid) {
- return -1;
+ return false;
}
/* Check effective address */
if ((address & mask) != tlb->EPN) {
- return -1;
+ return false;
}
*raddrp = (tlb->RPN & mask) | (address & ~mask);
- return 0;
+ return true;
}
/* Generic TLB search function for PowerPC embedded implementations */
@@ -525,7 +525,7 @@ int ppcemb_tlb_search(CPUPPCState *env, target_ulong address, uint32_t pid)
for (i = 0; i < env->nb_tlb; i++) {
tlb = &env->tlb.tlbe[i];
- if (ppcemb_tlb_check(env, tlb, &raddr, address, pid, i) == 0) {
+ if (ppcemb_tlb_check(env, tlb, &raddr, address, pid, i)) {
return i;
}
}
@@ -545,8 +545,8 @@ static int mmu40x_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
pr = FIELD_EX64(env->msr, MSR, PR);
for (i = 0; i < env->nb_tlb; i++) {
tlb = &env->tlb.tlbe[i];
- if (ppcemb_tlb_check(env, tlb, &raddr, address,
- env->spr[SPR_40x_PID], i) < 0) {
+ if (!ppcemb_tlb_check(env, tlb, &raddr, address,
+ env->spr[SPR_40x_PID], i)) {
continue;
}
zsel = (tlb->attr >> 4) & 0xF;
@@ -608,7 +608,7 @@ static int mmubooke_check_tlb(CPUPPCState *env, ppcemb_tlb_t *tlb,
int prot2;
if (ppcemb_tlb_check(env, tlb, raddr, address,
- env->spr[SPR_BOOKE_PID], i) >= 0) {
+ env->spr[SPR_BOOKE_PID], i)) {
if (!env->nb_pids) {
/* Extend the physical address to 36 bits */
*raddr |= (uint64_t)(tlb->RPN & 0xF) << 32;
@@ -618,13 +618,13 @@ static int mmubooke_check_tlb(CPUPPCState *env, ppcemb_tlb_t *tlb,
if (env->spr[SPR_BOOKE_PID1] &&
ppcemb_tlb_check(env, tlb, raddr, address,
- env->spr[SPR_BOOKE_PID1], i) >= 0) {
+ env->spr[SPR_BOOKE_PID1], i)) {
goto found_tlb;
}
if (env->spr[SPR_BOOKE_PID2] &&
ppcemb_tlb_check(env, tlb, raddr, address,
- env->spr[SPR_BOOKE_PID2], i) >= 0) {
+ env->spr[SPR_BOOKE_PID2], i)) {
goto found_tlb;
}
--
2.40.1
next prev parent reply other threads:[~2023-06-10 13:36 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-10 13:31 [PULL 00/29] ppc queue Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 01/29] pnv/xive2: Add definition for TCTXT Config register Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 02/29] pnv/xive2: Add definition for the ESB cache configuration register Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 03/29] pnv/xive2: Allow writes to the Physical Thread Enable registers Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 04/29] pnv/xive2: Introduce macros to manipulate TIMA addresses Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 05/29] pnv/xive2: Handle TIMA access through all ports Daniel Henrique Barboza
2023-06-20 10:45 ` Peter Maydell
2023-06-20 11:20 ` Cédric Le Goater
2023-06-20 14:31 ` Frederic Barrat
2023-06-20 14:57 ` Cédric Le Goater
2023-06-21 7:18 ` Cédric Le Goater
2023-06-21 15:18 ` Frederic Barrat
2023-06-21 16:59 ` Cédric Le Goater
2023-06-10 13:31 ` [PULL 06/29] target/ppc: Fix nested-hv HEAI delivery Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 07/29] pnv/xive2: Quiet down some error messages Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 08/29] target/ppc: Fix PMU hflags calculation Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 09/29] target/ppc: PMU do not clear MMCR0[FCECE] on performance monitor alert Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 10/29] target/ppc: Fix msgclrp interrupt type Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 11/29] target/ppc: Support directed privileged doorbell interrupt (SDOOR) Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 12/29] target/ppc: PMU implement PERFM interrupts Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 13/29] target/ppc: Remove single use function Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 14/29] target/ppc: Remove "ext" parameter of ppcemb_tlb_check() Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 15/29] target/ppc: Move ppcemb_tlb_search() to mmu_common.c Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 16/29] target/ppc: Remove some unneded line breaks Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 17/29] target/ppc: Simplify ppcemb_tlb_search() Daniel Henrique Barboza
2023-06-10 13:31 ` Daniel Henrique Barboza [this message]
2023-06-10 13:31 ` [PULL 19/29] target/ppc: Eliminate goto in mmubooke_check_tlb() Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 20/29] target/ppc: Fix lqarx to set cpu_reserve Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 21/29] target/ppc: Ensure stcx size matches larx Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 22/29] target/ppc: Remove larx/stcx. memory barrier semantics Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 23/29] target/ppc: Rework store conditional to avoid branch Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 24/29] target/ppc: Fix decrementer time underflow and infinite timer loop Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 25/29] target/ppc: Decrementer fix BookE semantics Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 26/29] hw/ppc/openpic: Do not open-code ROUND_UP() macro Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 27/29] tests/avocado/tuxrun_baselines: Fix ppc64 tests for binaries without slirp Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 28/29] target/ppc: Implement gathering irq statistics Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 29/29] hw/ppc/Kconfig: MAC_NEWWORLD should always select USB_OHCI_PCI Daniel Henrique Barboza
2023-06-10 15:44 ` [PULL 00/29] ppc queue Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230610133132.290703-19-danielhb413@gmail.com \
--to=danielhb413@gmail.com \
--cc=balaton@eik.bme.hu \
--cc=clg@kaod.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).