From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com,
peter.maydell@linaro.org, richard.henderson@linaro.org,
"Frederic Barrat" <fbarrat@linux.ibm.com>,
"Cédric Le Goater" <clg@kaod.org>
Subject: [PULL 01/29] pnv/xive2: Add definition for TCTXT Config register
Date: Sat, 10 Jun 2023 10:31:04 -0300 [thread overview]
Message-ID: <20230610133132.290703-2-danielhb413@gmail.com> (raw)
In-Reply-To: <20230610133132.290703-1-danielhb413@gmail.com>
From: Frederic Barrat <fbarrat@linux.ibm.com>
Add basic read/write support for the TCTXT Config register on P10. qemu
doesn't do anything with it yet, but it avoids logging a guest error
when skiboot configures the fused-core state:
qemu-system-ppc64 -machine powernv10 ... -d guest_errors
...
[ 0.131670000,5] XIVE: [ IC 00 ] Initializing XIVE block ID 0...
XIVE[0] - TCTXT: invalid read @140
XIVE[0] - TCTXT: invalid write @140
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20230601121331.487207-2-fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
hw/intc/pnv_xive2.c | 8 +++++++-
hw/intc/pnv_xive2_regs.h | 4 ++++
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index 7176d70234..889e409929 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -1265,6 +1265,9 @@ static uint64_t pnv_xive2_ic_tctxt_read(void *opaque, hwaddr offset,
case TCTXT_EN1_RESET:
val = xive->tctxt_regs[TCTXT_EN1 >> 3];
break;
+ case TCTXT_CFG:
+ val = xive->tctxt_regs[reg];
+ break;
default:
xive2_error(xive, "TCTXT: invalid read @%"HWADDR_PRIx, offset);
}
@@ -1276,6 +1279,7 @@ static void pnv_xive2_ic_tctxt_write(void *opaque, hwaddr offset,
uint64_t val, unsigned size)
{
PnvXive2 *xive = PNV_XIVE2(opaque);
+ uint32_t reg = offset >> 3;
switch (offset) {
/*
@@ -1297,7 +1301,9 @@ static void pnv_xive2_ic_tctxt_write(void *opaque, hwaddr offset,
case TCTXT_EN1_RESET:
xive->tctxt_regs[TCTXT_EN1 >> 3] &= ~val;
break;
-
+ case TCTXT_CFG:
+ xive->tctxt_regs[reg] = val;
+ break;
default:
xive2_error(xive, "TCTXT: invalid write @%"HWADDR_PRIx, offset);
return;
diff --git a/hw/intc/pnv_xive2_regs.h b/hw/intc/pnv_xive2_regs.h
index 0c096e4adb..8f1e0a1fde 100644
--- a/hw/intc/pnv_xive2_regs.h
+++ b/hw/intc/pnv_xive2_regs.h
@@ -405,6 +405,10 @@
#define X_TCTXT_EN1_RESET 0x307
#define TCTXT_EN1_RESET 0x038
+/* TCTXT Config register */
+#define X_TCTXT_CFG 0x328
+#define TCTXT_CFG 0x140
+
/*
* VSD Tables
*/
--
2.40.1
next prev parent reply other threads:[~2023-06-10 13:40 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-10 13:31 [PULL 00/29] ppc queue Daniel Henrique Barboza
2023-06-10 13:31 ` Daniel Henrique Barboza [this message]
2023-06-10 13:31 ` [PULL 02/29] pnv/xive2: Add definition for the ESB cache configuration register Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 03/29] pnv/xive2: Allow writes to the Physical Thread Enable registers Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 04/29] pnv/xive2: Introduce macros to manipulate TIMA addresses Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 05/29] pnv/xive2: Handle TIMA access through all ports Daniel Henrique Barboza
2023-06-20 10:45 ` Peter Maydell
2023-06-20 11:20 ` Cédric Le Goater
2023-06-20 14:31 ` Frederic Barrat
2023-06-20 14:57 ` Cédric Le Goater
2023-06-21 7:18 ` Cédric Le Goater
2023-06-21 15:18 ` Frederic Barrat
2023-06-21 16:59 ` Cédric Le Goater
2023-06-10 13:31 ` [PULL 06/29] target/ppc: Fix nested-hv HEAI delivery Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 07/29] pnv/xive2: Quiet down some error messages Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 08/29] target/ppc: Fix PMU hflags calculation Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 09/29] target/ppc: PMU do not clear MMCR0[FCECE] on performance monitor alert Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 10/29] target/ppc: Fix msgclrp interrupt type Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 11/29] target/ppc: Support directed privileged doorbell interrupt (SDOOR) Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 12/29] target/ppc: PMU implement PERFM interrupts Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 13/29] target/ppc: Remove single use function Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 14/29] target/ppc: Remove "ext" parameter of ppcemb_tlb_check() Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 15/29] target/ppc: Move ppcemb_tlb_search() to mmu_common.c Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 16/29] target/ppc: Remove some unneded line breaks Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 17/29] target/ppc: Simplify ppcemb_tlb_search() Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 18/29] target/ppc: Change ppcemb_tlb_check() to return bool Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 19/29] target/ppc: Eliminate goto in mmubooke_check_tlb() Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 20/29] target/ppc: Fix lqarx to set cpu_reserve Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 21/29] target/ppc: Ensure stcx size matches larx Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 22/29] target/ppc: Remove larx/stcx. memory barrier semantics Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 23/29] target/ppc: Rework store conditional to avoid branch Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 24/29] target/ppc: Fix decrementer time underflow and infinite timer loop Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 25/29] target/ppc: Decrementer fix BookE semantics Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 26/29] hw/ppc/openpic: Do not open-code ROUND_UP() macro Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 27/29] tests/avocado/tuxrun_baselines: Fix ppc64 tests for binaries without slirp Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 28/29] target/ppc: Implement gathering irq statistics Daniel Henrique Barboza
2023-06-10 13:31 ` [PULL 29/29] hw/ppc/Kconfig: MAC_NEWWORLD should always select USB_OHCI_PCI Daniel Henrique Barboza
2023-06-10 15:44 ` [PULL 00/29] ppc queue Richard Henderson
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