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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id f10-20020a170906824a00b00971433ed5fesm5169881ejx.184.2023.06.12.06.01.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jun 2023 06:01:55 -0700 (PDT) Date: Mon, 12 Jun 2023 15:01:54 +0200 From: Igor Mammedov To: Bernhard Beschow Cc: qemu-devel@nongnu.org, "Michael S. Tsirkin" , Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost Subject: Re: [PATCH 02/15] hw/pci-host/q35: Fix double, contradicting .endianness assignment Message-ID: <20230612150154.438d842f@imammedo.users.ipa.redhat.com> In-Reply-To: <20230611103412.12109-3-shentey@gmail.com> References: <20230611103412.12109-1-shentey@gmail.com> <20230611103412.12109-3-shentey@gmail.com> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Sun, 11 Jun 2023 12:33:59 +0200 Bernhard Beschow wrote: > Fixes the following clangd warning (-Winitializer-overrides): > > q35.c:297:19: Initializer overrides prior initialization of this subobject > q35.c:292:19: previous initialization is here > > Settle on native endian which causes the least overhead. indeed it doesn't matter which way we read all ones, so that should work. but does it really matter (I mean the overhead/what workload)? If not, I'd prefer explicit LE as it's now to be consistent the the rest of memops on Q35. > > Fixes: bafc90bdc594 ("q35: implement TSEG") > Signed-off-by: Bernhard Beschow > --- > hw/pci-host/q35.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c > index fd18920e7f..859c197f25 100644 > --- a/hw/pci-host/q35.c > +++ b/hw/pci-host/q35.c > @@ -290,7 +290,6 @@ static const MemoryRegionOps blackhole_ops = { > .valid.max_access_size = 4, > .impl.min_access_size = 4, > .impl.max_access_size = 4, > - .endianness = DEVICE_LITTLE_ENDIAN, > }; > > /* PCIe MMCFG */