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[88.146.207.194]) by smtp.gmail.com with ESMTPSA id jw19-20020a17090776b300b00973fac6065esm6242221ejc.223.2023.06.13.01.51.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Jun 2023 01:51:17 -0700 (PDT) Date: Tue, 13 Jun 2023 04:51:15 -0400 From: "Michael S. Tsirkin" To: Bernhard Beschow Cc: Igor Mammedov , qemu-devel@nongnu.org, Paolo Bonzini , Richard Henderson , Marcel Apfelbaum , Eduardo Habkost Subject: Re: [PATCH 02/15] hw/pci-host/q35: Fix double, contradicting .endianness assignment Message-ID: <20230613044810-mutt-send-email-mst@kernel.org> References: <20230611103412.12109-1-shentey@gmail.com> <20230611103412.12109-3-shentey@gmail.com> <20230612150154.438d842f@imammedo.users.ipa.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue, Jun 13, 2023 at 09:46:53AM +0200, Bernhard Beschow wrote: > On Mon, Jun 12, 2023 at 3:01 PM Igor Mammedov wrote: > > On Sun, 11 Jun 2023 12:33:59 +0200 > Bernhard Beschow wrote: > > > Fixes the following clangd warning (-Winitializer-overrides): > > > >   q35.c:297:19: Initializer overrides prior initialization of this > subobject > >   q35.c:292:19: previous initialization is here > > > > Settle on native endian which causes the least overhead. > indeed it doesn't matter which way we read all ones, so that should work. > but does it really matter (I mean the overhead/what workload)? > If not, I'd prefer explicit LE as it's now to be consistent > the the rest of memops on Q35. > > > I got a comment from Michael about this in [1], so I've changed it. I don't > mind changing it either way. > > Best regards, > Bernhard > > [1] https://patchew.org/QEMU/20230214131441.101760-1-shentey@gmail.com/ > 20230214131441.101760-3-shentey@gmail.com/# > 20230301164339-mutt-send-email-mst@kernel.org Hmm it's not terribly important, and the optimization is trivial, but yes people tend to copy code, good point. Maybe add a comment? /* * Note: don't copy this! normally use DEVICE_LITTLE_ENDIAN. This only * works because we don't allow writes and always read all-ones. */ > > > > > Fixes: bafc90bdc594 ("q35: implement TSEG") > > Signed-off-by: Bernhard Beschow > > --- > >  hw/pci-host/q35.c | 1 - > >  1 file changed, 1 deletion(-) > > > > diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c > > index fd18920e7f..859c197f25 100644 > > --- a/hw/pci-host/q35.c > > +++ b/hw/pci-host/q35.c > > @@ -290,7 +290,6 @@ static const MemoryRegionOps blackhole_ops = { > >      .valid.max_access_size = 4, > >      .impl.min_access_size = 4, > >      .impl.max_access_size = 4, > > -    .endianness = DEVICE_LITTLE_ENDIAN, > >  }; > >  > >  /* PCIe MMCFG */ > >