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* [PATCH] target/loongarch: Fix CSR.DMW0-3.VSEG check
@ 2023-06-14  6:55 Jiajie Chen
  2023-06-16  7:11 ` Song Gao
  0 siblings, 1 reply; 2+ messages in thread
From: Jiajie Chen @ 2023-06-14  6:55 UTC (permalink / raw)
  To: qemu-devel; +Cc: Jiajie Chen, Song Gao, Xiaojuan Yang

The previous code checks whether the highest 16 bits of virtual address
equal to that of CSR.DMW0-3. This is incorrect according to the spec,
and is corrected to compare only the highest four bits instead.

Signed-off-by: Jiajie Chen <c@jia.je>
---
 target/loongarch/tlb_helper.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/loongarch/tlb_helper.c b/target/loongarch/tlb_helper.c
index cce1db1e0a..6e00190547 100644
--- a/target/loongarch/tlb_helper.c
+++ b/target/loongarch/tlb_helper.c
@@ -185,10 +185,10 @@ static int get_physical_address(CPULoongArchState *env, hwaddr *physical,
     }
 
     plv = kernel_mode | (user_mode << R_CSR_DMW_PLV3_SHIFT);
-    base_v = address >> TARGET_VIRT_ADDR_SPACE_BITS;
+    base_v = address >> R_CSR_DMW_VSEG_SHIFT;
     /* Check direct map window */
     for (int i = 0; i < 4; i++) {
-        base_c = env->CSR_DMW[i] >> TARGET_VIRT_ADDR_SPACE_BITS;
+        base_c = FIELD_EX64(env->CSR_DMW[i], CSR_DMW, VSEG);
         if ((plv & env->CSR_DMW[i]) && (base_c == base_v)) {
             *physical = dmw_va2pa(address);
             *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
-- 
2.30.2



^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] target/loongarch: Fix CSR.DMW0-3.VSEG check
  2023-06-14  6:55 [PATCH] target/loongarch: Fix CSR.DMW0-3.VSEG check Jiajie Chen
@ 2023-06-16  7:11 ` Song Gao
  0 siblings, 0 replies; 2+ messages in thread
From: Song Gao @ 2023-06-16  7:11 UTC (permalink / raw)
  To: Jiajie Chen, qemu-devel; +Cc: Xiaojuan Yang



在 2023/6/14 下午2:55, Jiajie Chen 写道:
> The previous code checks whether the highest 16 bits of virtual address
> equal to that of CSR.DMW0-3. This is incorrect according to the spec,
> and is corrected to compare only the highest four bits instead.
>
> Signed-off-by: Jiajie Chen <c@jia.je>
> ---
>   target/loongarch/tlb_helper.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Song Gao <gaosong@loongson.cn>

Thanks.
Song Gao
> diff --git a/target/loongarch/tlb_helper.c b/target/loongarch/tlb_helper.c
> index cce1db1e0a..6e00190547 100644
> --- a/target/loongarch/tlb_helper.c
> +++ b/target/loongarch/tlb_helper.c
> @@ -185,10 +185,10 @@ static int get_physical_address(CPULoongArchState *env, hwaddr *physical,
>       }
>   
>       plv = kernel_mode | (user_mode << R_CSR_DMW_PLV3_SHIFT);
> -    base_v = address >> TARGET_VIRT_ADDR_SPACE_BITS;
> +    base_v = address >> R_CSR_DMW_VSEG_SHIFT;
>       /* Check direct map window */
>       for (int i = 0; i < 4; i++) {
> -        base_c = env->CSR_DMW[i] >> TARGET_VIRT_ADDR_SPACE_BITS;
> +        base_c = FIELD_EX64(env->CSR_DMW[i], CSR_DMW, VSEG);
>           if ((plv & env->CSR_DMW[i]) && (base_c == base_v)) {
>               *physical = dmw_va2pa(address);
>               *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;



^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2023-06-16  7:12 UTC | newest]

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