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[31.30.173.16]) by smtp.gmail.com with ESMTPSA id la1-20020a170906ad8100b009889f31d094sm5841859ejb.43.2023.06.23.02.46.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Jun 2023 02:46:32 -0700 (PDT) Date: Fri, 23 Jun 2023 11:46:31 +0200 From: Andrew Jones To: Daniel Henrique Barboza Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com Subject: Re: [PATCH v3 15/19] target/riscv/cpu.c: remove priv_ver check from riscv_isa_string_ext() Message-ID: <20230623-cceea5c383211d53109bc04b@orel> References: <20230622135700.105383-1-dbarboza@ventanamicro.com> <20230622135700.105383-16-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230622135700.105383-16-dbarboza@ventanamicro.com> Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=ajones@ventanamicro.com; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Thu, Jun 22, 2023 at 10:56:56AM -0300, Daniel Henrique Barboza wrote: > riscv_isa_string_ext() is being used by riscv_isa_string(), which is > then used by boards to retrieve the 'riscv,isa' string to be written in > the FDT. All this happens after riscv_cpu_realize(), meaning that we're > already past riscv_cpu_validate_set_extensions() and, more important, > riscv_cpu_disable_priv_spec_isa_exts(). > > This means that all extensions that needed to be disabled due to > priv_spec mismatch are already disabled. Checking this again during > riscv_isa_string_ext() is unneeded. Remove it. > > As a bonus, riscv_isa_string_ext() can now be used with the 'host' > KVM-only CPU type since it doesn't have a env->priv_ver assigned and it > would fail this check for no good reason. > > Signed-off-by: Daniel Henrique Barboza > --- > target/riscv/cpu.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 5a50cb1d0b..b65db165cc 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -2001,8 +2001,7 @@ static void riscv_isa_string_ext(RISCVCPU *cpu, char **isa_str, > int i; > > for (i = 0; i < ARRAY_SIZE(isa_edata_arr); i++) { > - if (cpu->env.priv_ver >= isa_edata_arr[i].min_version && > - isa_ext_is_enabled(cpu, &isa_edata_arr[i])) { > + if (isa_ext_is_enabled(cpu, &isa_edata_arr[i])) { > new = g_strconcat(old, "_", isa_edata_arr[i].name, NULL); > g_free(old); > old = new; > -- > 2.41.0 > Nice! Reviewed-by: Andrew Jones