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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: richard.henderson@linaro.org
Subject: [PATCH v3 07/11] target/i386: Intel only supports SYSCALL/SYSRET in long mode
Date: Fri, 23 Jun 2023 15:17:07 +0200	[thread overview]
Message-ID: <20230623131711.96775-8-pbonzini@redhat.com> (raw)
In-Reply-To: <20230623131711.96775-1-pbonzini@redhat.com>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/cpu.c           | 4 ++++
 target/i386/tcg/translate.c | 9 ++++++++-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 695e01582bf..978d24b5ec7 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6238,6 +6238,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
                 *ecx |= 1 << 1;    /* CmpLegacy bit */
             }
         }
+        if (tcg_enabled() && env->cpuid_vendor1 == CPUID_VENDOR_INTEL_1 &&
+            !(env->hflags & HF_LMA_MASK)) {
+            *edx &= ~CPUID_EXT2_SYSCALL;
+        }
         break;
     case 0x80000002:
     case 0x80000003:
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index b2e2dccb84f..ed4016f554b 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -5692,7 +5692,10 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
         break;
 #ifdef TARGET_X86_64
     case 0x105: /* syscall */
-        /* XXX: is it usable in real mode ? */
+        /* For Intel SYSCALL is only valid in long mode */
+        if (!LMA(s) && env->cpuid_vendor1 == CPUID_VENDOR_INTEL_1) {
+            goto illegal_op;
+        }
         gen_update_cc_op(s);
         gen_update_eip_cur(s);
         gen_helper_syscall(cpu_env, cur_insn_len_i32(s));
@@ -5702,6 +5705,10 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
         gen_eob_worker(s, false, true);
         break;
     case 0x107: /* sysret */
+        /* For Intel SYSRET is only valid in long mode */
+        if (!LMA(s) && env->cpuid_vendor1 == CPUID_VENDOR_INTEL_1) {
+            goto illegal_op;
+        }
         if (!PE(s)) {
             gen_exception_gpf(s);
         } else {
-- 
2.41.0



  parent reply	other threads:[~2023-06-23 13:19 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-23 13:17 [PATCH v3 00/11] target/i386: add a few simple features Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 01/11] target/i386: fix INVD vmexit Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 02/11] target/i386: TCG supports 3DNow! prefetch(w) Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 03/11] target/i386: TCG supports RDSEED Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 04/11] target/i386: do not accept RDSEED if CPUID bit absent Paolo Bonzini
2023-06-26  7:51   ` Richard Henderson
2023-06-23 13:17 ` [PATCH v3 05/11] target/i386: TCG supports XSAVEERPTR Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 06/11] target/i386: TCG supports WBNOINVD Paolo Bonzini
2023-06-23 13:17 ` Paolo Bonzini [this message]
2023-06-23 13:17 ` [PATCH v3 08/11] target/i386: AMD only supports SYSENTER/SYSEXIT in 32-bit mode Paolo Bonzini
2023-06-26  7:53   ` Richard Henderson
2023-06-23 13:17 ` [PATCH v3 09/11] target/i386: sysret and sysexit are privileged Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 10/11] target/i386: implement RDPID in TCG Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 11/11] target/i386: implement SYSCALL/SYSRET in 32-bit emulators Paolo Bonzini
2023-06-26  7:56   ` Richard Henderson

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