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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: richard.henderson@linaro.org
Subject: [PATCH v3 08/11] target/i386: AMD only supports SYSENTER/SYSEXIT in 32-bit mode
Date: Fri, 23 Jun 2023 15:17:08 +0200	[thread overview]
Message-ID: <20230623131711.96775-9-pbonzini@redhat.com> (raw)
In-Reply-To: <20230623131711.96775-1-pbonzini@redhat.com>

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/tcg/translate.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index ed4016f554b..a20b5af71e7 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -5669,9 +5669,10 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
         s->base.is_jmp = DISAS_NORETURN;
         break;
     case 0x134: /* sysenter */
-        /* For Intel SYSENTER is valid on 64-bit */
-        if (CODE64(s) && env->cpuid_vendor1 != CPUID_VENDOR_INTEL_1)
+        /* For AMD SYSENTER is not valid in long mode */
+        if (LMA(s) && env->cpuid_vendor1 != CPUID_VENDOR_INTEL_1) {
             goto illegal_op;
+        }
         if (!PE(s)) {
             gen_exception_gpf(s);
         } else {
@@ -5680,9 +5681,10 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
         }
         break;
     case 0x135: /* sysexit */
-        /* For Intel SYSEXIT is valid on 64-bit */
-        if (CODE64(s) && env->cpuid_vendor1 != CPUID_VENDOR_INTEL_1)
+        /* For AMD SYSEXIT is not valid in long mode */
+        if (LMA(s) && env->cpuid_vendor1 != CPUID_VENDOR_INTEL_1) {
             goto illegal_op;
+        }
         if (!PE(s)) {
             gen_exception_gpf(s);
         } else {
-- 
2.41.0



  parent reply	other threads:[~2023-06-23 13:18 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-23 13:17 [PATCH v3 00/11] target/i386: add a few simple features Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 01/11] target/i386: fix INVD vmexit Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 02/11] target/i386: TCG supports 3DNow! prefetch(w) Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 03/11] target/i386: TCG supports RDSEED Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 04/11] target/i386: do not accept RDSEED if CPUID bit absent Paolo Bonzini
2023-06-26  7:51   ` Richard Henderson
2023-06-23 13:17 ` [PATCH v3 05/11] target/i386: TCG supports XSAVEERPTR Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 06/11] target/i386: TCG supports WBNOINVD Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 07/11] target/i386: Intel only supports SYSCALL/SYSRET in long mode Paolo Bonzini
2023-06-23 13:17 ` Paolo Bonzini [this message]
2023-06-26  7:53   ` [PATCH v3 08/11] target/i386: AMD only supports SYSENTER/SYSEXIT in 32-bit mode Richard Henderson
2023-06-23 13:17 ` [PATCH v3 09/11] target/i386: sysret and sysexit are privileged Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 10/11] target/i386: implement RDPID in TCG Paolo Bonzini
2023-06-23 13:17 ` [PATCH v3 11/11] target/i386: implement SYSCALL/SYSRET in 32-bit emulators Paolo Bonzini
2023-06-26  7:56   ` Richard Henderson

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