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Tsirkin" To: Julia Suvorova Cc: Ani Sinha , qemu-devel@nongnu.org, Marcel Apfelbaum , imammedo@redhat.com Subject: Re: [PATCH v2 5/5] hw/pci: ensure PCIE devices are plugged into only slot 0 of PCIE port Message-ID: <20230625171058-mutt-send-email-mst@kernel.org> References: <20230622103255.267289-1-anisinha@redhat.com> <20230622103255.267289-6-anisinha@redhat.com> <20230622134437-mutt-send-email-mst@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=-1, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, Jun 23, 2023 at 04:57:20PM +0200, Julia Suvorova wrote: > On Thu, Jun 22, 2023 at 7:48 PM Michael S. Tsirkin wrote: > > > > On Thu, Jun 22, 2023 at 05:46:40PM +0200, Julia Suvorova wrote: > > > On Thu, Jun 22, 2023 at 12:34 PM Ani Sinha wrote: > > > > > > > > PCI Express ports only have one slot, so PCI Express devices can only be > > > > plugged into slot 0 on a PCIE port. Enforce it. > > > > > > > > CC: jusual@redhat.com > > > > CC: imammedo@redhat.com > > > > Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=2128929 > > > > Signed-off-by: Ani Sinha > > > > --- > > > > hw/pci/pci.c | 6 ++++++ > > > > 1 file changed, 6 insertions(+) > > > > > > > > diff --git a/hw/pci/pci.c b/hw/pci/pci.c > > > > index bf38905b7d..5f25ab9f5e 100644 > > > > --- a/hw/pci/pci.c > > > > +++ b/hw/pci/pci.c > > > > @@ -64,6 +64,7 @@ bool pci_available = true; > > > > static char *pcibus_get_dev_path(DeviceState *dev); > > > > static char *pcibus_get_fw_dev_path(DeviceState *dev); > > > > static void pcibus_reset(BusState *qbus); > > > > +static bool pcie_has_upstream_port(PCIDevice *dev); > > > > > > > > static Property pci_props[] = { > > > > DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1), > > > > @@ -1189,6 +1190,11 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, > > > > name); > > > > > > > > return NULL; > > > > + } else if (pcie_has_upstream_port(pci_dev) && PCI_SLOT(devfn)) { > > > > + error_setg(errp, "PCI: slot %d is not valid for %s," > > > > + " PCI express devices can only be plugged into slot 0.", > > > > > > This is not technically correct, because downstream ports and root > > > ports are also PCIe devices, and they can have different slots under > > > upstream ports and RC. But this error will never be shown for them, so > > > it seems fine. > > > > Hmm. Confusing users is not nice ... I agree this might > > make people think they can not use root ports in slot !=0 either. > > > > Would you add "with an upstream port"? > > E.g. "PCI Express devices with an upstream port" ? > > This whole upstream port conditioning is quite confusing. > How about "%parent device% only allows plugging into slot 0"? > > Best regards, Julia Suvorova. Good idea! > > > > > > Reviewed-by: Julia Suvorova > > > > > > > > > > > > > > > > + PCI_SLOT(devfn), name); > > > > + return NULL; > > > > } > > > > > > > > pci_dev->devfn = devfn; > > > > -- > > > > 2.39.1 > > > > > >