* [PATCH v1 1/5] linux-headers: Update to v6.4-rc7
2023-06-26 6:49 [PATCH v1 0/5] target/arm: Handle psci calls in userspace Shaoqin Huang
@ 2023-06-26 6:49 ` Shaoqin Huang
2023-06-26 6:49 ` [PATCH v1 2/5] linux-headers: Import arm-smccc.h from Linux v6.4-rc7 Shaoqin Huang
` (4 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Shaoqin Huang @ 2023-06-26 6:49 UTC (permalink / raw)
To: qemu-devel, qemu-arm
Cc: oliver.upton, salil.mehta, james.morse, gshan, Shaoqin Huang,
Michael S. Tsirkin, Cornelia Huck, Paolo Bonzini, kvm
Update to commit 45a3e24f65e9 ("Linux 6.4-rc7").
Signed-off-by: Shaoqin Huang <shahuang@redhat.com>
---
include/standard-headers/linux/const.h | 2 +-
include/standard-headers/linux/virtio_blk.h | 18 +++----
.../standard-headers/linux/virtio_config.h | 6 +++
include/standard-headers/linux/virtio_net.h | 1 +
| 33 ++++++++++++
| 53 ++++++++++++++++++-
| 9 ++++
| 1 +
| 1 +
| 3 ++
| 2 +-
| 12 +++--
| 7 +++
| 17 +++++-
14 files changed, 149 insertions(+), 16 deletions(-)
diff --git a/include/standard-headers/linux/const.h b/include/standard-headers/linux/const.h
index 5e48987251..1eb84b5087 100644
--- a/include/standard-headers/linux/const.h
+++ b/include/standard-headers/linux/const.h
@@ -28,7 +28,7 @@
#define _BITUL(x) (_UL(1) << (x))
#define _BITULL(x) (_ULL(1) << (x))
-#define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (typeof(x))(a) - 1)
+#define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (__typeof__(x))(a) - 1)
#define __ALIGN_KERNEL_MASK(x, mask) (((x) + (mask)) & ~(mask))
#define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
diff --git a/include/standard-headers/linux/virtio_blk.h b/include/standard-headers/linux/virtio_blk.h
index 7155b1a470..d7be3cf5e4 100644
--- a/include/standard-headers/linux/virtio_blk.h
+++ b/include/standard-headers/linux/virtio_blk.h
@@ -138,11 +138,11 @@ struct virtio_blk_config {
/* Zoned block device characteristics (if VIRTIO_BLK_F_ZONED) */
struct virtio_blk_zoned_characteristics {
- uint32_t zone_sectors;
- uint32_t max_open_zones;
- uint32_t max_active_zones;
- uint32_t max_append_sectors;
- uint32_t write_granularity;
+ __virtio32 zone_sectors;
+ __virtio32 max_open_zones;
+ __virtio32 max_active_zones;
+ __virtio32 max_append_sectors;
+ __virtio32 write_granularity;
uint8_t model;
uint8_t unused2[3];
} zoned;
@@ -239,11 +239,11 @@ struct virtio_blk_outhdr {
*/
struct virtio_blk_zone_descriptor {
/* Zone capacity */
- uint64_t z_cap;
+ __virtio64 z_cap;
/* The starting sector of the zone */
- uint64_t z_start;
+ __virtio64 z_start;
/* Zone write pointer position in sectors */
- uint64_t z_wp;
+ __virtio64 z_wp;
/* Zone type */
uint8_t z_type;
/* Zone state */
@@ -252,7 +252,7 @@ struct virtio_blk_zone_descriptor {
};
struct virtio_blk_zone_report {
- uint64_t nr_zones;
+ __virtio64 nr_zones;
uint8_t reserved[56];
struct virtio_blk_zone_descriptor zones[];
};
diff --git a/include/standard-headers/linux/virtio_config.h b/include/standard-headers/linux/virtio_config.h
index 965ee6ae23..8a7d0dc8b0 100644
--- a/include/standard-headers/linux/virtio_config.h
+++ b/include/standard-headers/linux/virtio_config.h
@@ -97,6 +97,12 @@
*/
#define VIRTIO_F_SR_IOV 37
+/*
+ * This feature indicates that the driver passes extra data (besides
+ * identifying the virtqueue) in its device notifications.
+ */
+#define VIRTIO_F_NOTIFICATION_DATA 38
+
/*
* This feature indicates that the driver can reset a queue individually.
*/
diff --git a/include/standard-headers/linux/virtio_net.h b/include/standard-headers/linux/virtio_net.h
index c0e797067a..2325485f2c 100644
--- a/include/standard-headers/linux/virtio_net.h
+++ b/include/standard-headers/linux/virtio_net.h
@@ -61,6 +61,7 @@
#define VIRTIO_NET_F_GUEST_USO6 55 /* Guest can handle USOv6 in. */
#define VIRTIO_NET_F_HOST_USO 56 /* Host can handle USO in. */
#define VIRTIO_NET_F_HASH_REPORT 57 /* Supports hash report */
+#define VIRTIO_NET_F_GUEST_HDRLEN 59 /* Guest provides the exact hdr_len value. */
#define VIRTIO_NET_F_RSS 60 /* Supports RSS RX steering */
#define VIRTIO_NET_F_RSC_EXT 61 /* extended coalescing info */
#define VIRTIO_NET_F_STANDBY 62 /* Act as standby for another device
--git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h
index d7e7bb885e..38e5957526 100644
--- a/linux-headers/asm-arm64/kvm.h
+++ b/linux-headers/asm-arm64/kvm.h
@@ -198,6 +198,15 @@ struct kvm_arm_copy_mte_tags {
__u64 reserved[2];
};
+/*
+ * Counter/Timer offset structure. Describe the virtual/physical offset.
+ * To be used with KVM_ARM_SET_COUNTER_OFFSET.
+ */
+struct kvm_arm_counter_offset {
+ __u64 counter_offset;
+ __u64 reserved;
+};
+
#define KVM_ARM_TAGS_TO_GUEST 0
#define KVM_ARM_TAGS_FROM_GUEST 1
@@ -363,6 +372,10 @@ enum {
KVM_REG_ARM_VENDOR_HYP_BIT_PTP = 1,
};
+/* Device Control API on vm fd */
+#define KVM_ARM_VM_SMCCC_CTRL 0
+#define KVM_ARM_VM_SMCCC_FILTER 0
+
/* Device Control API: ARM VGIC */
#define KVM_DEV_ARM_VGIC_GRP_ADDR 0
#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1
@@ -402,6 +415,8 @@ enum {
#define KVM_ARM_VCPU_TIMER_CTRL 1
#define KVM_ARM_VCPU_TIMER_IRQ_VTIMER 0
#define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1
+#define KVM_ARM_VCPU_TIMER_IRQ_HVTIMER 2
+#define KVM_ARM_VCPU_TIMER_IRQ_HPTIMER 3
#define KVM_ARM_VCPU_PVTIME_CTRL 2
#define KVM_ARM_VCPU_PVTIME_IPA 0
@@ -458,6 +473,24 @@ enum {
/* run->fail_entry.hardware_entry_failure_reason codes. */
#define KVM_EXIT_FAIL_ENTRY_CPU_UNSUPPORTED (1ULL << 0)
+enum kvm_smccc_filter_action {
+ KVM_SMCCC_FILTER_HANDLE = 0,
+ KVM_SMCCC_FILTER_DENY,
+ KVM_SMCCC_FILTER_FWD_TO_USER,
+
+};
+
+struct kvm_smccc_filter {
+ __u32 base;
+ __u32 nr_functions;
+ __u8 action;
+ __u8 pad[15];
+};
+
+/* arm64-specific KVM_EXIT_HYPERCALL flags */
+#define KVM_HYPERCALL_EXIT_SMC (1U << 0)
+#define KVM_HYPERCALL_EXIT_16BIT (1U << 1)
+
#endif
#endif /* __ARM_KVM_H__ */
--git a/linux-headers/asm-riscv/kvm.h b/linux-headers/asm-riscv/kvm.h
index 92af6f3f05..f92790c948 100644
--- a/linux-headers/asm-riscv/kvm.h
+++ b/linux-headers/asm-riscv/kvm.h
@@ -12,6 +12,7 @@
#ifndef __ASSEMBLY__
#include <linux/types.h>
+#include <asm/bitsperlong.h>
#include <asm/ptrace.h>
#define __KVM_HAVE_READONLY_MEM
@@ -52,6 +53,7 @@ struct kvm_riscv_config {
unsigned long mvendorid;
unsigned long marchid;
unsigned long mimpid;
+ unsigned long zicboz_block_size;
};
/* CORE registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
@@ -64,7 +66,7 @@ struct kvm_riscv_core {
#define KVM_RISCV_MODE_S 1
#define KVM_RISCV_MODE_U 0
-/* CSR registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
+/* General CSR registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
struct kvm_riscv_csr {
unsigned long sstatus;
unsigned long sie;
@@ -78,6 +80,17 @@ struct kvm_riscv_csr {
unsigned long scounteren;
};
+/* AIA CSR registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
+struct kvm_riscv_aia_csr {
+ unsigned long siselect;
+ unsigned long iprio1;
+ unsigned long iprio2;
+ unsigned long sieh;
+ unsigned long siph;
+ unsigned long iprio1h;
+ unsigned long iprio2h;
+};
+
/* TIMER registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */
struct kvm_riscv_timer {
__u64 frequency;
@@ -105,9 +118,29 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_SVINVAL,
KVM_RISCV_ISA_EXT_ZIHINTPAUSE,
KVM_RISCV_ISA_EXT_ZICBOM,
+ KVM_RISCV_ISA_EXT_ZICBOZ,
+ KVM_RISCV_ISA_EXT_ZBB,
+ KVM_RISCV_ISA_EXT_SSAIA,
KVM_RISCV_ISA_EXT_MAX,
};
+/*
+ * SBI extension IDs specific to KVM. This is not the same as the SBI
+ * extension IDs defined by the RISC-V SBI specification.
+ */
+enum KVM_RISCV_SBI_EXT_ID {
+ KVM_RISCV_SBI_EXT_V01 = 0,
+ KVM_RISCV_SBI_EXT_TIME,
+ KVM_RISCV_SBI_EXT_IPI,
+ KVM_RISCV_SBI_EXT_RFENCE,
+ KVM_RISCV_SBI_EXT_SRST,
+ KVM_RISCV_SBI_EXT_HSM,
+ KVM_RISCV_SBI_EXT_PMU,
+ KVM_RISCV_SBI_EXT_EXPERIMENTAL,
+ KVM_RISCV_SBI_EXT_VENDOR,
+ KVM_RISCV_SBI_EXT_MAX,
+};
+
/* Possible states for kvm_riscv_timer */
#define KVM_RISCV_TIMER_STATE_OFF 0
#define KVM_RISCV_TIMER_STATE_ON 1
@@ -118,6 +151,8 @@ enum KVM_RISCV_ISA_EXT_ID {
/* If you need to interpret the index values, here is the key: */
#define KVM_REG_RISCV_TYPE_MASK 0x00000000FF000000
#define KVM_REG_RISCV_TYPE_SHIFT 24
+#define KVM_REG_RISCV_SUBTYPE_MASK 0x0000000000FF0000
+#define KVM_REG_RISCV_SUBTYPE_SHIFT 16
/* Config registers are mapped as type 1 */
#define KVM_REG_RISCV_CONFIG (0x01 << KVM_REG_RISCV_TYPE_SHIFT)
@@ -131,8 +166,12 @@ enum KVM_RISCV_ISA_EXT_ID {
/* Control and status registers are mapped as type 3 */
#define KVM_REG_RISCV_CSR (0x03 << KVM_REG_RISCV_TYPE_SHIFT)
+#define KVM_REG_RISCV_CSR_GENERAL (0x0 << KVM_REG_RISCV_SUBTYPE_SHIFT)
+#define KVM_REG_RISCV_CSR_AIA (0x1 << KVM_REG_RISCV_SUBTYPE_SHIFT)
#define KVM_REG_RISCV_CSR_REG(name) \
(offsetof(struct kvm_riscv_csr, name) / sizeof(unsigned long))
+#define KVM_REG_RISCV_CSR_AIA_REG(name) \
+ (offsetof(struct kvm_riscv_aia_csr, name) / sizeof(unsigned long))
/* Timer registers are mapped as type 4 */
#define KVM_REG_RISCV_TIMER (0x04 << KVM_REG_RISCV_TYPE_SHIFT)
@@ -152,6 +191,18 @@ enum KVM_RISCV_ISA_EXT_ID {
/* ISA Extension registers are mapped as type 7 */
#define KVM_REG_RISCV_ISA_EXT (0x07 << KVM_REG_RISCV_TYPE_SHIFT)
+/* SBI extension registers are mapped as type 8 */
+#define KVM_REG_RISCV_SBI_EXT (0x08 << KVM_REG_RISCV_TYPE_SHIFT)
+#define KVM_REG_RISCV_SBI_SINGLE (0x0 << KVM_REG_RISCV_SUBTYPE_SHIFT)
+#define KVM_REG_RISCV_SBI_MULTI_EN (0x1 << KVM_REG_RISCV_SUBTYPE_SHIFT)
+#define KVM_REG_RISCV_SBI_MULTI_DIS (0x2 << KVM_REG_RISCV_SUBTYPE_SHIFT)
+#define KVM_REG_RISCV_SBI_MULTI_REG(__ext_id) \
+ ((__ext_id) / __BITS_PER_LONG)
+#define KVM_REG_RISCV_SBI_MULTI_MASK(__ext_id) \
+ (1UL << ((__ext_id) % __BITS_PER_LONG))
+#define KVM_REG_RISCV_SBI_MULTI_REG_LAST \
+ KVM_REG_RISCV_SBI_MULTI_REG(KVM_RISCV_SBI_EXT_MAX - 1)
+
#endif
#endif /* __LINUX_KVM_RISCV_H */
--git a/linux-headers/asm-riscv/unistd.h b/linux-headers/asm-riscv/unistd.h
index 73d7cdd2ec..950ab3fd44 100644
--- a/linux-headers/asm-riscv/unistd.h
+++ b/linux-headers/asm-riscv/unistd.h
@@ -43,3 +43,12 @@
#define __NR_riscv_flush_icache (__NR_arch_specific_syscall + 15)
#endif
__SYSCALL(__NR_riscv_flush_icache, sys_riscv_flush_icache)
+
+/*
+ * Allows userspace to query the kernel for CPU architecture and
+ * microarchitecture details across a given set of CPUs.
+ */
+#ifndef __NR_riscv_hwprobe
+#define __NR_riscv_hwprobe (__NR_arch_specific_syscall + 14)
+#endif
+__SYSCALL(__NR_riscv_hwprobe, sys_riscv_hwprobe)
--git a/linux-headers/asm-s390/unistd_32.h b/linux-headers/asm-s390/unistd_32.h
index 8e644d65f5..800f3adb20 100644
--- a/linux-headers/asm-s390/unistd_32.h
+++ b/linux-headers/asm-s390/unistd_32.h
@@ -419,6 +419,7 @@
#define __NR_landlock_create_ruleset 444
#define __NR_landlock_add_rule 445
#define __NR_landlock_restrict_self 446
+#define __NR_memfd_secret 447
#define __NR_process_mrelease 448
#define __NR_futex_waitv 449
#define __NR_set_mempolicy_home_node 450
--git a/linux-headers/asm-s390/unistd_64.h b/linux-headers/asm-s390/unistd_64.h
index 51da542fec..399a605901 100644
--- a/linux-headers/asm-s390/unistd_64.h
+++ b/linux-headers/asm-s390/unistd_64.h
@@ -367,6 +367,7 @@
#define __NR_landlock_create_ruleset 444
#define __NR_landlock_add_rule 445
#define __NR_landlock_restrict_self 446
+#define __NR_memfd_secret 447
#define __NR_process_mrelease 448
#define __NR_futex_waitv 449
#define __NR_set_mempolicy_home_node 450
--git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h
index 2937e7bf69..2b3a8f7bd2 100644
--- a/linux-headers/asm-x86/kvm.h
+++ b/linux-headers/asm-x86/kvm.h
@@ -557,4 +557,7 @@ struct kvm_pmu_event_filter {
#define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter (TSC) */
#define KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */
+/* x86-specific KVM_EXIT_HYPERCALL flags. */
+#define KVM_EXIT_HYPERCALL_LONG_MODE BIT(0)
+
#endif /* _ASM_X86_KVM_H */
--git a/linux-headers/linux/const.h b/linux-headers/linux/const.h
index 5e48987251..1eb84b5087 100644
--- a/linux-headers/linux/const.h
+++ b/linux-headers/linux/const.h
@@ -28,7 +28,7 @@
#define _BITUL(x) (_UL(1) << (x))
#define _BITULL(x) (_ULL(1) << (x))
-#define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (typeof(x))(a) - 1)
+#define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (__typeof__(x))(a) - 1)
#define __ALIGN_KERNEL_MASK(x, mask) (((x) + (mask)) & ~(mask))
#define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
--git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index 599de3c6e3..65b145b317 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -341,8 +341,11 @@ struct kvm_run {
__u64 nr;
__u64 args[6];
__u64 ret;
- __u32 longmode;
- __u32 pad;
+
+ union {
+ __u32 longmode;
+ __u64 flags;
+ };
} hypercall;
/* KVM_EXIT_TPR_ACCESS */
struct {
@@ -1182,6 +1185,7 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_S390_PROTECTED_ASYNC_DISABLE 224
#define KVM_CAP_DIRTY_LOG_RING_WITH_BITMAP 225
#define KVM_CAP_PMU_EVENT_MASKED_EVENTS 226
+#define KVM_CAP_COUNTER_OFFSET 227
#ifdef KVM_CAP_IRQ_ROUTING
@@ -1449,7 +1453,7 @@ struct kvm_vfio_spapr_tce {
#define KVM_CREATE_VCPU _IO(KVMIO, 0x41)
#define KVM_GET_DIRTY_LOG _IOW(KVMIO, 0x42, struct kvm_dirty_log)
#define KVM_SET_NR_MMU_PAGES _IO(KVMIO, 0x44)
-#define KVM_GET_NR_MMU_PAGES _IO(KVMIO, 0x45)
+#define KVM_GET_NR_MMU_PAGES _IO(KVMIO, 0x45) /* deprecated */
#define KVM_SET_USER_MEMORY_REGION _IOW(KVMIO, 0x46, \
struct kvm_userspace_memory_region)
#define KVM_SET_TSS_ADDR _IO(KVMIO, 0x47)
@@ -1541,6 +1545,8 @@ struct kvm_s390_ucas_mapping {
#define KVM_SET_PMU_EVENT_FILTER _IOW(KVMIO, 0xb2, struct kvm_pmu_event_filter)
#define KVM_PPC_SVM_OFF _IO(KVMIO, 0xb3)
#define KVM_ARM_MTE_COPY_TAGS _IOR(KVMIO, 0xb4, struct kvm_arm_copy_mte_tags)
+/* Available with KVM_CAP_COUNTER_OFFSET */
+#define KVM_ARM_SET_COUNTER_OFFSET _IOW(KVMIO, 0xb5, struct kvm_arm_counter_offset)
/* ioctl for vm fd */
#define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device)
--git a/linux-headers/linux/psp-sev.h b/linux-headers/linux/psp-sev.h
index 51d8b3940e..12ccb70099 100644
--- a/linux-headers/linux/psp-sev.h
+++ b/linux-headers/linux/psp-sev.h
@@ -36,6 +36,13 @@ enum {
* SEV Firmware status code
*/
typedef enum {
+ /*
+ * This error code is not in the SEV spec. Its purpose is to convey that
+ * there was an error that prevented the SEV firmware from being called.
+ * The SEV API error codes are 16 bits, so the -1 value will not overlap
+ * with possible values from the specification.
+ */
+ SEV_RET_NO_FW_CALL = -1,
SEV_RET_SUCCESS = 0,
SEV_RET_INVALID_PLATFORM_STATE,
SEV_RET_INVALID_GUEST_STATE,
--git a/linux-headers/linux/userfaultfd.h b/linux-headers/linux/userfaultfd.h
index ba5d0df52f..14e402263a 100644
--- a/linux-headers/linux/userfaultfd.h
+++ b/linux-headers/linux/userfaultfd.h
@@ -38,7 +38,8 @@
UFFD_FEATURE_MINOR_HUGETLBFS | \
UFFD_FEATURE_MINOR_SHMEM | \
UFFD_FEATURE_EXACT_ADDRESS | \
- UFFD_FEATURE_WP_HUGETLBFS_SHMEM)
+ UFFD_FEATURE_WP_HUGETLBFS_SHMEM | \
+ UFFD_FEATURE_WP_UNPOPULATED)
#define UFFD_API_IOCTLS \
((__u64)1 << _UFFDIO_REGISTER | \
(__u64)1 << _UFFDIO_UNREGISTER | \
@@ -203,6 +204,12 @@ struct uffdio_api {
*
* UFFD_FEATURE_WP_HUGETLBFS_SHMEM indicates that userfaultfd
* write-protection mode is supported on both shmem and hugetlbfs.
+ *
+ * UFFD_FEATURE_WP_UNPOPULATED indicates that userfaultfd
+ * write-protection mode will always apply to unpopulated pages
+ * (i.e. empty ptes). This will be the default behavior for shmem
+ * & hugetlbfs, so this flag only affects anonymous memory behavior
+ * when userfault write-protection mode is registered.
*/
#define UFFD_FEATURE_PAGEFAULT_FLAG_WP (1<<0)
#define UFFD_FEATURE_EVENT_FORK (1<<1)
@@ -217,6 +224,7 @@ struct uffdio_api {
#define UFFD_FEATURE_MINOR_SHMEM (1<<10)
#define UFFD_FEATURE_EXACT_ADDRESS (1<<11)
#define UFFD_FEATURE_WP_HUGETLBFS_SHMEM (1<<12)
+#define UFFD_FEATURE_WP_UNPOPULATED (1<<13)
__u64 features;
__u64 ioctls;
@@ -297,6 +305,13 @@ struct uffdio_writeprotect {
struct uffdio_continue {
struct uffdio_range range;
#define UFFDIO_CONTINUE_MODE_DONTWAKE ((__u64)1<<0)
+ /*
+ * UFFDIO_CONTINUE_MODE_WP will map the page write protected on
+ * the fly. UFFDIO_CONTINUE_MODE_WP is available only if the
+ * write protected ioctl is implemented for the range
+ * according to the uffdio_register.ioctls.
+ */
+#define UFFDIO_CONTINUE_MODE_WP ((__u64)1<<1)
__u64 mode;
/*
--
2.39.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v1 2/5] linux-headers: Import arm-smccc.h from Linux v6.4-rc7
2023-06-26 6:49 [PATCH v1 0/5] target/arm: Handle psci calls in userspace Shaoqin Huang
2023-06-26 6:49 ` [PATCH v1 1/5] linux-headers: Update to v6.4-rc7 Shaoqin Huang
@ 2023-06-26 6:49 ` Shaoqin Huang
2023-07-04 9:05 ` Cornelia Huck
2023-06-26 6:49 ` [PATCH v1 3/5] target/arm: make psci call can be used by kvm Shaoqin Huang
` (3 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Shaoqin Huang @ 2023-06-26 6:49 UTC (permalink / raw)
To: qemu-devel, qemu-arm
Cc: oliver.upton, salil.mehta, james.morse, gshan, Shaoqin Huang,
Michael S. Tsirkin, Cornelia Huck, Paolo Bonzini
Copy in the SMCCC definitions from the kernel, which will be used to
implement SMCCC handling in userspace.
Signed-off-by: Shaoqin Huang <shahuang@redhat.com>
---
| 240 ++++++++++++++++++++++++++++++++
1 file changed, 240 insertions(+)
create mode 100644 linux-headers/linux/arm-smccc.h
--git a/linux-headers/linux/arm-smccc.h b/linux-headers/linux/arm-smccc.h
new file mode 100644
index 0000000000..3663c31ba5
--- /dev/null
+++ b/linux-headers/linux/arm-smccc.h
@@ -0,0 +1,240 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2015, Linaro Limited
+ */
+#ifndef __LINUX_ARM_SMCCC_H
+#define __LINUX_ARM_SMCCC_H
+
+#include <linux/const.h>
+
+/*
+ * This file provides common defines for ARM SMC Calling Convention as
+ * specified in
+ * https://developer.arm.com/docs/den0028/latest
+ *
+ * This code is up-to-date with version DEN 0028 C
+ */
+
+#define ARM_SMCCC_STD_CALL _AC(0,U)
+#define ARM_SMCCC_FAST_CALL _AC(1,U)
+#define ARM_SMCCC_TYPE_SHIFT 31
+
+#define ARM_SMCCC_SMC_32 0
+#define ARM_SMCCC_SMC_64 1
+#define ARM_SMCCC_CALL_CONV_SHIFT 30
+
+#define ARM_SMCCC_OWNER_MASK 0x3F
+#define ARM_SMCCC_OWNER_SHIFT 24
+
+#define ARM_SMCCC_FUNC_MASK 0xFFFF
+
+#define ARM_SMCCC_IS_FAST_CALL(smc_val) \
+ ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
+#define ARM_SMCCC_IS_64(smc_val) \
+ ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
+#define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK)
+#define ARM_SMCCC_OWNER_NUM(smc_val) \
+ (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
+
+#define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
+ (((type) << ARM_SMCCC_TYPE_SHIFT) | \
+ ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
+ (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
+ ((func_num) & ARM_SMCCC_FUNC_MASK))
+
+#define ARM_SMCCC_OWNER_ARCH 0
+#define ARM_SMCCC_OWNER_CPU 1
+#define ARM_SMCCC_OWNER_SIP 2
+#define ARM_SMCCC_OWNER_OEM 3
+#define ARM_SMCCC_OWNER_STANDARD 4
+#define ARM_SMCCC_OWNER_STANDARD_HYP 5
+#define ARM_SMCCC_OWNER_VENDOR_HYP 6
+#define ARM_SMCCC_OWNER_TRUSTED_APP 48
+#define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
+#define ARM_SMCCC_OWNER_TRUSTED_OS 50
+#define ARM_SMCCC_OWNER_TRUSTED_OS_END 63
+
+#define ARM_SMCCC_FUNC_QUERY_CALL_UID 0xff01
+
+#define ARM_SMCCC_QUIRK_NONE 0
+#define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */
+
+#define ARM_SMCCC_VERSION_1_0 0x10000
+#define ARM_SMCCC_VERSION_1_1 0x10001
+#define ARM_SMCCC_VERSION_1_2 0x10002
+#define ARM_SMCCC_VERSION_1_3 0x10003
+
+#define ARM_SMCCC_1_3_SVE_HINT 0x10000
+
+#define ARM_SMCCC_VERSION_FUNC_ID \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ 0, 0)
+
+#define ARM_SMCCC_ARCH_FEATURES_FUNC_ID \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ 0, 1)
+
+#define ARM_SMCCC_ARCH_SOC_ID \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ 0, 2)
+
+#define ARM_SMCCC_ARCH_WORKAROUND_1 \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ 0, 0x8000)
+
+#define ARM_SMCCC_ARCH_WORKAROUND_2 \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ 0, 0x7fff)
+
+#define ARM_SMCCC_ARCH_WORKAROUND_3 \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ 0, 0x3fff)
+
+#define ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ ARM_SMCCC_OWNER_VENDOR_HYP, \
+ ARM_SMCCC_FUNC_QUERY_CALL_UID)
+
+/* KVM UID value: 28b46fb6-2ec5-11e9-a9ca-4b564d003a74 */
+#define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_0 0xb66fb428U
+#define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_1 0xe911c52eU
+#define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_2 0x564bcaa9U
+#define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_3 0x743a004dU
+
+/* KVM "vendor specific" services */
+#define ARM_SMCCC_KVM_FUNC_FEATURES 0
+#define ARM_SMCCC_KVM_FUNC_PTP 1
+#define ARM_SMCCC_KVM_FUNC_FEATURES_2 127
+#define ARM_SMCCC_KVM_NUM_FUNCS 128
+
+#define ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ ARM_SMCCC_OWNER_VENDOR_HYP, \
+ ARM_SMCCC_KVM_FUNC_FEATURES)
+
+#define SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED 1
+
+/*
+ * ptp_kvm is a feature used for time sync between vm and host.
+ * ptp_kvm module in guest kernel will get service from host using
+ * this hypercall ID.
+ */
+#define ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ ARM_SMCCC_OWNER_VENDOR_HYP, \
+ ARM_SMCCC_KVM_FUNC_PTP)
+
+/* ptp_kvm counter type ID */
+#define KVM_PTP_VIRT_COUNTER 0
+#define KVM_PTP_PHYS_COUNTER 1
+
+/* Paravirtualised time calls (defined by ARM DEN0057A) */
+#define ARM_SMCCC_HV_PV_TIME_FEATURES \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_64, \
+ ARM_SMCCC_OWNER_STANDARD_HYP, \
+ 0x20)
+
+#define ARM_SMCCC_HV_PV_TIME_ST \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_64, \
+ ARM_SMCCC_OWNER_STANDARD_HYP, \
+ 0x21)
+
+/* TRNG entropy source calls (defined by ARM DEN0098) */
+#define ARM_SMCCC_TRNG_VERSION \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ ARM_SMCCC_OWNER_STANDARD, \
+ 0x50)
+
+#define ARM_SMCCC_TRNG_FEATURES \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ ARM_SMCCC_OWNER_STANDARD, \
+ 0x51)
+
+#define ARM_SMCCC_TRNG_GET_UUID \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ ARM_SMCCC_OWNER_STANDARD, \
+ 0x52)
+
+#define ARM_SMCCC_TRNG_RND32 \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_32, \
+ ARM_SMCCC_OWNER_STANDARD, \
+ 0x53)
+
+#define ARM_SMCCC_TRNG_RND64 \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
+ ARM_SMCCC_SMC_64, \
+ ARM_SMCCC_OWNER_STANDARD, \
+ 0x53)
+
+/*
+ * Return codes defined in ARM DEN 0070A
+ * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028 C
+ */
+#define SMCCC_RET_SUCCESS 0
+#define SMCCC_RET_NOT_SUPPORTED -1
+#define SMCCC_RET_NOT_REQUIRED -2
+#define SMCCC_RET_INVALID_PARAMETER -3
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+
+enum arm_smccc_conduit {
+ SMCCC_CONDUIT_NONE,
+ SMCCC_CONDUIT_SMC,
+ SMCCC_CONDUIT_HVC,
+};
+
+/**
+ * struct arm_smccc_res - Result from SMC/HVC call
+ * @a0-a3 result values from registers 0 to 3
+ */
+struct arm_smccc_res {
+ unsigned long a0;
+ unsigned long a1;
+ unsigned long a2;
+ unsigned long a3;
+};
+
+/**
+ * struct arm_smccc_1_2_regs - Arguments for or Results from SMC/HVC call
+ * @a0-a17 argument values from registers 0 to 17
+ */
+struct arm_smccc_1_2_regs {
+ unsigned long a0;
+ unsigned long a1;
+ unsigned long a2;
+ unsigned long a3;
+ unsigned long a4;
+ unsigned long a5;
+ unsigned long a6;
+ unsigned long a7;
+ unsigned long a8;
+ unsigned long a9;
+ unsigned long a10;
+ unsigned long a11;
+ unsigned long a12;
+ unsigned long a13;
+ unsigned long a14;
+ unsigned long a15;
+ unsigned long a16;
+ unsigned long a17;
+};
+
+#endif /*__ASSEMBLY__*/
+#endif /*__LINUX_ARM_SMCCC_H*/
--
2.39.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v1 2/5] linux-headers: Import arm-smccc.h from Linux v6.4-rc7
2023-06-26 6:49 ` [PATCH v1 2/5] linux-headers: Import arm-smccc.h from Linux v6.4-rc7 Shaoqin Huang
@ 2023-07-04 9:05 ` Cornelia Huck
0 siblings, 0 replies; 12+ messages in thread
From: Cornelia Huck @ 2023-07-04 9:05 UTC (permalink / raw)
To: Shaoqin Huang, qemu-devel, qemu-arm
Cc: oliver.upton, salil.mehta, james.morse, gshan, Shaoqin Huang,
Michael S. Tsirkin, Paolo Bonzini
On Mon, Jun 26 2023, Shaoqin Huang <shahuang@redhat.com> wrote:
> Copy in the SMCCC definitions from the kernel, which will be used to
> implement SMCCC handling in userspace.
>
> Signed-off-by: Shaoqin Huang <shahuang@redhat.com>
> ---
> linux-headers/linux/arm-smccc.h | 240 ++++++++++++++++++++++++++++++++
> 1 file changed, 240 insertions(+)
> create mode 100644 linux-headers/linux/arm-smccc.h
I think you need to add this to the headers update script, so that
changes get propagated in the future as well.
(I'd just add it to the script and do the update in one go.)
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v1 3/5] target/arm: make psci call can be used by kvm
2023-06-26 6:49 [PATCH v1 0/5] target/arm: Handle psci calls in userspace Shaoqin Huang
2023-06-26 6:49 ` [PATCH v1 1/5] linux-headers: Update to v6.4-rc7 Shaoqin Huang
2023-06-26 6:49 ` [PATCH v1 2/5] linux-headers: Import arm-smccc.h from Linux v6.4-rc7 Shaoqin Huang
@ 2023-06-26 6:49 ` Shaoqin Huang
2023-06-26 6:49 ` [PATCH v1 4/5] arm/kvm: add skeleton implementation for userspace SMCCC call handling Shaoqin Huang
` (2 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Shaoqin Huang @ 2023-06-26 6:49 UTC (permalink / raw)
To: qemu-devel, qemu-arm
Cc: oliver.upton, salil.mehta, james.morse, gshan, Shaoqin Huang,
Peter Maydell
Now the psci call can only be used when tcg_enabled, we want to reuse it
when kvm_enabled, which will be used in subsequent patch which enable
the psci handling in userspace.
Signed-off-by: Shaoqin Huang <shahuang@redhat.com>
---
target/arm/helper.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index d4bee43bd0..58063a92a6 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11020,7 +11020,8 @@ void arm_cpu_do_interrupt(CPUState *cs)
env->exception.syndrome);
}
- if (tcg_enabled() && arm_is_psci_call(cpu, cs->exception_index)) {
+ if ((tcg_enabled() || kvm_enabled()) &&
+ arm_is_psci_call(cpu, cs->exception_index)) {
arm_handle_psci_call(cpu);
qemu_log_mask(CPU_LOG_INT, "...handled as PSCI call\n");
return;
--
2.39.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v1 4/5] arm/kvm: add skeleton implementation for userspace SMCCC call handling
2023-06-26 6:49 [PATCH v1 0/5] target/arm: Handle psci calls in userspace Shaoqin Huang
` (2 preceding siblings ...)
2023-06-26 6:49 ` [PATCH v1 3/5] target/arm: make psci call can be used by kvm Shaoqin Huang
@ 2023-06-26 6:49 ` Shaoqin Huang
2023-07-04 9:17 ` Cornelia Huck
2023-06-26 6:49 ` [PATCH v1 5/5] arm/kvm: add support for userspace psci calls handling Shaoqin Huang
2023-06-26 13:42 ` [PATCH v1 0/5] target/arm: Handle psci calls in userspace Salil Mehta via
5 siblings, 1 reply; 12+ messages in thread
From: Shaoqin Huang @ 2023-06-26 6:49 UTC (permalink / raw)
To: qemu-devel, qemu-arm
Cc: oliver.upton, salil.mehta, james.morse, gshan, Shaoqin Huang,
Peter Maydell, Paolo Bonzini, kvm
The SMCCC call filtering provide the ability to forward the SMCCC call
to userspace, so we provide a new option `user-smccc` to enable handling
SMCCC call in userspace, the default value is off.
And add the skeleton implementation for userspace SMCCC call
initialization and handling.
Signed-off-by: Shaoqin Huang <shahuang@redhat.com>
---
docs/system/arm/virt.rst | 4 +++
hw/arm/virt.c | 21 ++++++++++++++++
include/hw/arm/virt.h | 1 +
target/arm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++++
4 files changed, 80 insertions(+)
diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst
index 1cab33f02e..ff43d52f04 100644
--- a/docs/system/arm/virt.rst
+++ b/docs/system/arm/virt.rst
@@ -155,6 +155,10 @@ dtb-randomness
DTB to be non-deterministic. It would be the responsibility of
the firmware to come up with a seed and pass it on if it wants to.
+user-smccc
+ Set ``on``/``off`` to enable/disable handling smccc call in userspace
+ instead of kernel.
+
dtb-kaslr-seed
A deprecated synonym for dtb-randomness.
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 9b9f7d9c68..767720321c 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -42,6 +42,7 @@
#include "hw/vfio/vfio-amd-xgbe.h"
#include "hw/display/ramfb.h"
#include "net/net.h"
+#include "qom/object.h"
#include "sysemu/device_tree.h"
#include "sysemu/numa.h"
#include "sysemu/runstate.h"
@@ -2511,6 +2512,19 @@ static void virt_set_oem_table_id(Object *obj, const char *value,
strncpy(vms->oem_table_id, value, 8);
}
+static bool virt_get_user_smccc(Object *obj, Error **errp)
+{
+ VirtMachineState *vms = VIRT_MACHINE(obj);
+
+ return vms->user_smccc;
+}
+
+static void virt_set_user_smccc(Object *obj, bool value, Error **errp)
+{
+ VirtMachineState *vms = VIRT_MACHINE(obj);
+
+ vms->user_smccc = value;
+}
bool virt_is_acpi_enabled(VirtMachineState *vms)
{
@@ -3155,6 +3169,13 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
"in ACPI table header."
"The string may be up to 8 bytes in size");
+ object_class_property_add_bool(oc, "user-smccc",
+ virt_get_user_smccc,
+ virt_set_user_smccc);
+ object_class_property_set_description(oc, "user-smccc",
+ "Set on/off to enable/disable "
+ "handling smccc call in userspace");
+
}
static void virt_instance_init(Object *obj)
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index e1ddbea96b..4f1bc12680 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -160,6 +160,7 @@ struct VirtMachineState {
bool ras;
bool mte;
bool dtb_randomness;
+ bool user_smccc;
OnOffAuto acpi;
VirtGICType gic_version;
VirtIOMMUType iommu;
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index 84da49332c..579c6edd49 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -9,6 +9,8 @@
*/
#include "qemu/osdep.h"
+#include <asm-arm64/kvm.h>
+#include <linux/arm-smccc.h>
#include <sys/ioctl.h>
#include <linux/kvm.h>
@@ -247,6 +249,20 @@ int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa)
return ret > 0 ? ret : 40;
}
+static int kvm_arm_init_smccc_filter(KVMState *s)
+{
+ int ret = 0;
+
+ if (kvm_vm_check_attr(s, KVM_ARM_VM_SMCCC_CTRL, KVM_ARM_VM_SMCCC_FILTER)) {
+ error_report("ARM SMCCC filter not supported");
+ ret = -EINVAL;
+ goto out;
+ }
+
+out:
+ return ret;
+}
+
int kvm_arch_init(MachineState *ms, KVMState *s)
{
int ret = 0;
@@ -282,6 +298,10 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
kvm_arm_init_debug(s);
+ if (ret == 0 && object_property_get_bool(OBJECT(ms), "user-smccc", NULL)) {
+ ret = kvm_arm_init_smccc_filter(s);
+ }
+
return ret;
}
@@ -912,6 +932,37 @@ static int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss,
return -1;
}
+static void kvm_arm_smccc_return_result(CPUState *cs, struct arm_smccc_res *res)
+{
+ ARMCPU *cpu = ARM_CPU(cs);
+ CPUARMState *env = &cpu->env;
+
+ env->xregs[0] = res->a0;
+ env->xregs[1] = res->a1;
+ env->xregs[2] = res->a2;
+ env->xregs[3] = res->a3;
+}
+
+static int kvm_arm_handle_hypercall(CPUState *cs, struct kvm_run *run)
+{
+ uint32_t fn = run->hypercall.nr;
+ struct arm_smccc_res res = {
+ .a0 = SMCCC_RET_NOT_SUPPORTED,
+ };
+ int ret = 0;
+
+ kvm_cpu_synchronize_state(cs);
+
+ switch (ARM_SMCCC_OWNER_NUM(fn)) {
+ default:
+ break;
+ }
+
+ kvm_arm_smccc_return_result(cs, &res);
+
+ return ret;
+}
+
int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
{
int ret = 0;
@@ -927,6 +978,9 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
ret = kvm_arm_handle_dabt_nisv(cs, run->arm_nisv.esr_iss,
run->arm_nisv.fault_ipa);
break;
+ case KVM_EXIT_HYPERCALL:
+ ret = kvm_arm_handle_hypercall(cs, run);
+ break;
default:
qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
__func__, run->exit_reason);
--
2.39.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v1 4/5] arm/kvm: add skeleton implementation for userspace SMCCC call handling
2023-06-26 6:49 ` [PATCH v1 4/5] arm/kvm: add skeleton implementation for userspace SMCCC call handling Shaoqin Huang
@ 2023-07-04 9:17 ` Cornelia Huck
0 siblings, 0 replies; 12+ messages in thread
From: Cornelia Huck @ 2023-07-04 9:17 UTC (permalink / raw)
To: Shaoqin Huang, qemu-devel, qemu-arm
Cc: oliver.upton, salil.mehta, james.morse, gshan, Shaoqin Huang,
Peter Maydell, Paolo Bonzini, kvm
On Mon, Jun 26 2023, Shaoqin Huang <shahuang@redhat.com> wrote:
> The SMCCC call filtering provide the ability to forward the SMCCC call
> to userspace, so we provide a new option `user-smccc` to enable handling
> SMCCC call in userspace, the default value is off.
>
> And add the skeleton implementation for userspace SMCCC call
> initialization and handling.
>
> Signed-off-by: Shaoqin Huang <shahuang@redhat.com>
> ---
> docs/system/arm/virt.rst | 4 +++
> hw/arm/virt.c | 21 ++++++++++++++++
> include/hw/arm/virt.h | 1 +
> target/arm/kvm.c | 54 ++++++++++++++++++++++++++++++++++++++++
> 4 files changed, 80 insertions(+)
>
> diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst
> index 1cab33f02e..ff43d52f04 100644
> --- a/docs/system/arm/virt.rst
> +++ b/docs/system/arm/virt.rst
> @@ -155,6 +155,10 @@ dtb-randomness
> DTB to be non-deterministic. It would be the responsibility of
> the firmware to come up with a seed and pass it on if it wants to.
>
> +user-smccc
> + Set ``on``/``off`` to enable/disable handling smccc call in userspace
> + instead of kernel.
> +
> dtb-kaslr-seed
> A deprecated synonym for dtb-randomness.
>
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 9b9f7d9c68..767720321c 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -42,6 +42,7 @@
> #include "hw/vfio/vfio-amd-xgbe.h"
> #include "hw/display/ramfb.h"
> #include "net/net.h"
> +#include "qom/object.h"
> #include "sysemu/device_tree.h"
> #include "sysemu/numa.h"
> #include "sysemu/runstate.h"
> @@ -2511,6 +2512,19 @@ static void virt_set_oem_table_id(Object *obj, const char *value,
> strncpy(vms->oem_table_id, value, 8);
> }
>
> +static bool virt_get_user_smccc(Object *obj, Error **errp)
> +{
> + VirtMachineState *vms = VIRT_MACHINE(obj);
> +
> + return vms->user_smccc;
> +}
> +
> +static void virt_set_user_smccc(Object *obj, bool value, Error **errp)
> +{
> + VirtMachineState *vms = VIRT_MACHINE(obj);
> +
> + vms->user_smccc = value;
> +}
>
> bool virt_is_acpi_enabled(VirtMachineState *vms)
> {
> @@ -3155,6 +3169,13 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
> "in ACPI table header."
> "The string may be up to 8 bytes in size");
>
> + object_class_property_add_bool(oc, "user-smccc",
> + virt_get_user_smccc,
> + virt_set_user_smccc);
> + object_class_property_set_description(oc, "user-smccc",
> + "Set on/off to enable/disable "
> + "handling smccc call in userspace");
> +
> }
>
> static void virt_instance_init(Object *obj)
This knob pretty much only makes sense for KVM guests, and we'll ignore
it with tcg -- would it make sense to check that we are actually using
KVM before we proceed (like we do for the tcg-only props?)
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v1 5/5] arm/kvm: add support for userspace psci calls handling
2023-06-26 6:49 [PATCH v1 0/5] target/arm: Handle psci calls in userspace Shaoqin Huang
` (3 preceding siblings ...)
2023-06-26 6:49 ` [PATCH v1 4/5] arm/kvm: add skeleton implementation for userspace SMCCC call handling Shaoqin Huang
@ 2023-06-26 6:49 ` Shaoqin Huang
2023-06-26 13:42 ` [PATCH v1 0/5] target/arm: Handle psci calls in userspace Salil Mehta via
5 siblings, 0 replies; 12+ messages in thread
From: Shaoqin Huang @ 2023-06-26 6:49 UTC (permalink / raw)
To: qemu-devel, qemu-arm
Cc: oliver.upton, salil.mehta, james.morse, gshan, Shaoqin Huang,
Peter Maydell, Paolo Bonzini, kvm
Use the SMCCC filter to start sending psci calls to userspace, qemu will
need to handle the psci calls. In qemu, reuse the psci handler which
used for tcg, while use it, we need to take care the reset vcpu process
which will reset the vcpu register and grab all vcpu locks when reset
gicv3.
So when reset vcpu, we need to mark it as dirty to force the vcpu to
sync its register to kvm, and when reset gicv3, we need to pause all
vcpus to grab the all vcpu locks, thus when handling the psci CPU_ON
call, the vcpu can be successfuly boot up.
Signed-off-by: Shaoqin Huang <shahuang@redhat.com>
---
hw/intc/arm_gicv3_kvm.c | 10 +++++
target/arm/kvm.c | 94 ++++++++++++++++++++++++++++++++++++++++-
2 files changed, 103 insertions(+), 1 deletion(-)
diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c
index 72ad916d3d..e42898c1d6 100644
--- a/hw/intc/arm_gicv3_kvm.c
+++ b/hw/intc/arm_gicv3_kvm.c
@@ -24,6 +24,7 @@
#include "hw/intc/arm_gicv3_common.h"
#include "qemu/error-report.h"
#include "qemu/module.h"
+#include "sysemu/cpus.h"
#include "sysemu/kvm.h"
#include "sysemu/runstate.h"
#include "kvm_arm.h"
@@ -695,10 +696,19 @@ static void arm_gicv3_icc_reset(CPUARMState *env, const ARMCPRegInfo *ri)
return;
}
+ /*
+ * When handling psci call in userspace like cpu hotplug, this shall be called
+ * when other vcpus might be running. Host kernel KVM to handle device
+ * access of IOCTLs KVM_{GET|SET}_DEVICE_ATTR might fail due to inability to
+ * grab vcpu locks for all the vcpus. Hence, we need to pause all vcpus to
+ * facilitate locking within host.
+ */
+ pause_all_vcpus();
/* Initialize to actual HW supported configuration */
kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS,
KVM_VGIC_ATTR(ICC_CTLR_EL1, c->gicr_typer),
&c->icc_ctlr_el1[GICV3_NS], false, &error_abort);
+ resume_all_vcpus();
c->icc_ctlr_el1[GICV3_S] = c->icc_ctlr_el1[GICV3_NS];
}
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index 579c6edd49..d2857a8499 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -10,6 +10,7 @@
#include "qemu/osdep.h"
#include <asm-arm64/kvm.h>
+#include <linux/psci.h>
#include <linux/arm-smccc.h>
#include <sys/ioctl.h>
@@ -251,7 +252,29 @@ int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa)
static int kvm_arm_init_smccc_filter(KVMState *s)
{
+ unsigned int i;
int ret = 0;
+ struct kvm_smccc_filter filter_ranges[] = {
+ {
+ .base = KVM_PSCI_FN_BASE,
+ .nr_functions = 4,
+ .action = KVM_SMCCC_FILTER_DENY,
+ },
+ {
+ .base = PSCI_0_2_FN_BASE,
+ .nr_functions = 0x20,
+ .action = KVM_SMCCC_FILTER_FWD_TO_USER,
+ },
+ {
+ .base = PSCI_0_2_FN64_BASE,
+ .nr_functions = 0x20,
+ .action = KVM_SMCCC_FILTER_FWD_TO_USER,
+ },
+ };
+ struct kvm_device_attr attr = {
+ .group = KVM_ARM_VM_SMCCC_CTRL,
+ .attr = KVM_ARM_VM_SMCCC_FILTER,
+ };
if (kvm_vm_check_attr(s, KVM_ARM_VM_SMCCC_CTRL, KVM_ARM_VM_SMCCC_FILTER)) {
error_report("ARM SMCCC filter not supported");
@@ -259,6 +282,16 @@ static int kvm_arm_init_smccc_filter(KVMState *s)
goto out;
}
+ for (i = 0; i < ARRAY_SIZE(filter_ranges); i++) {
+ attr.addr = (uint64_t)&filter_ranges[i];
+
+ ret = kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr);
+ if (ret < 0) {
+ error_report("KVM_SET_DEVICE_ATTR failed when SMCCC init");
+ goto out;
+ }
+ }
+
out:
return ret;
}
@@ -654,6 +687,14 @@ void kvm_arm_reset_vcpu(ARMCPU *cpu)
* for the same reason we do so in kvm_arch_get_registers().
*/
write_list_to_cpustate(cpu);
+
+ /*
+ * When enabled userspace psci call handling, qemu will reset the vcpu if
+ * it's PSCI CPU_ON call. Since this will reset the vcpu register and
+ * power_state, we should sync these state to kvm, so manually set the
+ * vcpu_dirty to force the qemu to put register to kvm.
+ */
+ CPU(cpu)->vcpu_dirty = true;
}
/*
@@ -932,6 +973,51 @@ static int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss,
return -1;
}
+static int kvm_arm_handle_psci(CPUState *cs, struct kvm_run *run)
+{
+ if (run->hypercall.flags & KVM_HYPERCALL_EXIT_SMC) {
+ cs->exception_index = EXCP_SMC;
+ } else {
+ cs->exception_index = EXCP_HVC;
+ }
+
+ qemu_mutex_lock_iothread();
+ arm_cpu_do_interrupt(cs);
+ qemu_mutex_unlock_iothread();
+
+ /*
+ * We need to exit the run loop to have the chance to execute the
+ * qemu_wait_io_event() which will execute the psci function which queued in
+ * the cpu work queue.
+ */
+ return EXCP_INTERRUPT;
+}
+
+static int kvm_arm_handle_std_call(CPUState *cs, struct kvm_run *run,
+ struct arm_smccc_res *res,
+ bool *sync_reg)
+{
+ uint32_t fn = run->hypercall.nr;
+ int ret = 0;
+
+ switch (ARM_SMCCC_FUNC_NUM(fn)) {
+ /* PSCI */
+ case 0x00 ... 0x1F:
+ /*
+ * We will reuse the psci handler, but the handler directly get psci
+ * call parameter from register, and write the return value to register.
+ * So we no need to sync the value in arm_smccc_res.
+ */
+ *sync_reg = false;
+ ret = kvm_arm_handle_psci(cs, run);
+ break;
+ default:
+ break;
+ }
+
+ return ret;
+}
+
static void kvm_arm_smccc_return_result(CPUState *cs, struct arm_smccc_res *res)
{
ARMCPU *cpu = ARM_CPU(cs);
@@ -949,16 +1035,22 @@ static int kvm_arm_handle_hypercall(CPUState *cs, struct kvm_run *run)
struct arm_smccc_res res = {
.a0 = SMCCC_RET_NOT_SUPPORTED,
};
+ bool sync_reg = true;
int ret = 0;
kvm_cpu_synchronize_state(cs);
switch (ARM_SMCCC_OWNER_NUM(fn)) {
+ case ARM_SMCCC_OWNER_STANDARD:
+ ret = kvm_arm_handle_std_call(cs, run, &res, &sync_reg);
+ break;
default:
break;
}
- kvm_arm_smccc_return_result(cs, &res);
+ if (sync_reg) {
+ kvm_arm_smccc_return_result(cs, &res);
+ }
return ret;
}
--
2.39.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* RE: [PATCH v1 0/5] target/arm: Handle psci calls in userspace
2023-06-26 6:49 [PATCH v1 0/5] target/arm: Handle psci calls in userspace Shaoqin Huang
` (4 preceding siblings ...)
2023-06-26 6:49 ` [PATCH v1 5/5] arm/kvm: add support for userspace psci calls handling Shaoqin Huang
@ 2023-06-26 13:42 ` Salil Mehta via
2023-06-27 2:34 ` Shaoqin Huang
5 siblings, 1 reply; 12+ messages in thread
From: Salil Mehta via @ 2023-06-26 13:42 UTC (permalink / raw)
To: Shaoqin Huang, qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: oliver.upton@linux.dev, james.morse@arm.com, gshan@redhat.com,
Cornelia Huck, kvm@vger.kernel.org, Michael S. Tsirkin,
Paolo Bonzini, Peter Maydell, Salil Mehta
> From: Shaoqin Huang <shahuang@redhat.com>
> Sent: Monday, June 26, 2023 7:49 AM
> To: qemu-devel@nongnu.org; qemu-arm@nongnu.org
> Cc: oliver.upton@linux.dev; Salil Mehta <salil.mehta@huawei.com>;
> james.morse@arm.com; gshan@redhat.com; Shaoqin Huang <shahuang@redhat.com>;
> Cornelia Huck <cohuck@redhat.com>; kvm@vger.kernel.org; Michael S. Tsirkin
> <mst@redhat.com>; Paolo Bonzini <pbonzini@redhat.com>; Peter Maydell
> <peter.maydell@linaro.org>
> Subject: [PATCH v1 0/5] target/arm: Handle psci calls in userspace
>
> The userspace SMCCC call filtering[1] provides the ability to forward the SMCCC
> calls to the userspace. The vCPU hotplug[2] would be the first legitimate use
> case to handle the psci calls in userspace, thus the vCPU hotplug can deny the
> PSCI_ON call if the vCPU is not present now.
>
> This series try to enable the userspace SMCCC call filtering, thus can handle
> the SMCCC call in userspace. The first enabled SMCCC call is psci call, by using
> the new added option 'user-smccc', we can enable handle psci calls in userspace.
>
> qemu-system-aarch64 -machine virt,user-smccc=on
>
> This series reuse the qemu implementation of the psci handling, thus the
> handling process is very simple. But when handling psci in userspace when using
> kvm, the reset vcpu process need to be taking care, the detail is included in
> the patch05.
This change in intended for VCPU Hotplug and we are duplicating the code
we are working on. Unless this change is also intended for any other
feature I would request you to defer this.
Thanks
Salil
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v1 0/5] target/arm: Handle psci calls in userspace
2023-06-26 13:42 ` [PATCH v1 0/5] target/arm: Handle psci calls in userspace Salil Mehta via
@ 2023-06-27 2:34 ` Shaoqin Huang
2023-07-04 9:58 ` Salil Mehta via
0 siblings, 1 reply; 12+ messages in thread
From: Shaoqin Huang @ 2023-06-27 2:34 UTC (permalink / raw)
To: Salil Mehta, qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: oliver.upton@linux.dev, james.morse@arm.com, gshan@redhat.com,
Cornelia Huck, kvm@vger.kernel.org, Michael S. Tsirkin,
Paolo Bonzini, Peter Maydell, Salil Mehta
Hi Salil,
On 6/26/23 21:42, Salil Mehta wrote:
>> From: Shaoqin Huang <shahuang@redhat.com>
>> Sent: Monday, June 26, 2023 7:49 AM
>> To: qemu-devel@nongnu.org; qemu-arm@nongnu.org
>> Cc: oliver.upton@linux.dev; Salil Mehta <salil.mehta@huawei.com>;
>> james.morse@arm.com; gshan@redhat.com; Shaoqin Huang <shahuang@redhat.com>;
>> Cornelia Huck <cohuck@redhat.com>; kvm@vger.kernel.org; Michael S. Tsirkin
>> <mst@redhat.com>; Paolo Bonzini <pbonzini@redhat.com>; Peter Maydell
>> <peter.maydell@linaro.org>
>> Subject: [PATCH v1 0/5] target/arm: Handle psci calls in userspace
>>
>> The userspace SMCCC call filtering[1] provides the ability to forward the SMCCC
>> calls to the userspace. The vCPU hotplug[2] would be the first legitimate use
>> case to handle the psci calls in userspace, thus the vCPU hotplug can deny the
>> PSCI_ON call if the vCPU is not present now.
>>
>> This series try to enable the userspace SMCCC call filtering, thus can handle
>> the SMCCC call in userspace. The first enabled SMCCC call is psci call, by using
>> the new added option 'user-smccc', we can enable handle psci calls in userspace.
>>
>> qemu-system-aarch64 -machine virt,user-smccc=on
>>
>> This series reuse the qemu implementation of the psci handling, thus the
>> handling process is very simple. But when handling psci in userspace when using
>> kvm, the reset vcpu process need to be taking care, the detail is included in
>> the patch05.
>
> This change in intended for VCPU Hotplug and we are duplicating the code
> we are working on. Unless this change is also intended for any other
> feature I would request you to defer this.
Thanks for sharing me the information. I'm not intended for merging this
series, but discuss something about the VCPU Hotplug, since I'm also
following the work of vCPU Hotplug.
Just curious, what is your plan to update a new version of VCPU Hotplug
which is based on the userspace SMCCC filtering?
Thanks,
Shaoqin
>
>
> Thanks
> Salil
>
--
Shaoqin
^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH v1 0/5] target/arm: Handle psci calls in userspace
2023-06-27 2:34 ` Shaoqin Huang
@ 2023-07-04 9:58 ` Salil Mehta via
2023-07-13 0:27 ` Gavin Shan
0 siblings, 1 reply; 12+ messages in thread
From: Salil Mehta via @ 2023-07-04 9:58 UTC (permalink / raw)
To: Shaoqin Huang, qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: oliver.upton@linux.dev, james.morse@arm.com, gshan@redhat.com,
Cornelia Huck, kvm@vger.kernel.org, Michael S. Tsirkin,
Paolo Bonzini, Peter Maydell, Salil Mehta
Hi Shaoqin,
Just saw this. Apologies. I missed to reply this earlier as I was bit
disconnected for last few days.
> From: Shaoqin Huang <shahuang@redhat.com>
> Sent: Tuesday, June 27, 2023 3:35 AM
> Hi Salil,
>
> On 6/26/23 21:42, Salil Mehta wrote:
> >> From: Shaoqin Huang <shahuang@redhat.com>
> >> Sent: Monday, June 26, 2023 7:49 AM
> >> To: qemu-devel@nongnu.org; qemu-arm@nongnu.org
> >> Cc: oliver.upton@linux.dev; Salil Mehta <salil.mehta@huawei.com>;
> >> james.morse@arm.com; gshan@redhat.com; Shaoqin Huang <shahuang@redhat.com>;
> >> Cornelia Huck <cohuck@redhat.com>; kvm@vger.kernel.org; Michael S. Tsirkin
> >> <mst@redhat.com>; Paolo Bonzini <pbonzini@redhat.com>; Peter Maydell <peter.maydell@linaro.org>
> >> Subject: [PATCH v1 0/5] target/arm: Handle psci calls in userspace
> >>
> >> The userspace SMCCC call filtering[1] provides the ability to forward the SMCCC
> >> calls to the userspace. The vCPU hotplug[2] would be the first legitimate use
> >> case to handle the psci calls in userspace, thus the vCPU hotplug can deny the
> >> PSCI_ON call if the vCPU is not present now.
> >>
> >> This series try to enable the userspace SMCCC call filtering, thus can handle
> >> the SMCCC call in userspace. The first enabled SMCCC call is psci call, by using
> >> the new added option 'user-smccc', we can enable handle psci calls in userspace.
> >>
> >> qemu-system-aarch64 -machine virt,user-smccc=on
> >>
> >> This series reuse the qemu implementation of the psci handling, thus the
> >> handling process is very simple. But when handling psci in userspace when using
> >> kvm, the reset vcpu process need to be taking care, the detail is included in
> >> the patch05.
> >
> > This change is intended for VCPU Hotplug and are duplicating the code
> > we are working on. Unless this change is also intended for any other
> > feature I would request you to defer this.
>
> Thanks for sharing me the information. I'm not intended for merging this
> series, but discuss something about the VCPU Hotplug, since I'm also
> following the work of vCPU Hotplug.
Sure. I am not against this work in any way but there was bit of an overlap and was
trying to avoid that.
>
> Just curious, what is your plan to update a new version of VCPU Hotplug
> which is based on the userspace SMCCC filtering?
We have already incorporated this. We have not tested it properly though and
there are some issues related to the migration we are fixing.
I did mention about this in the KVMForum2023 presentation as well.
Latest Qemu Prototype (Pre RFC V2) (Not in the final shape of the patches)
https://github.com/salil-mehta/qemu.git virt-cpuhp-armv8/rfc-v1-port11052023.dev-1
should work against below kernel changes as confirmed by James,
Latest Kernel Prototype (Pre RFC V2 = RFC V1 + Fixes)
https://git.gitlab.arm.com/linux-arm/linux-jm.git virtual_cpu_hotplug/rfc/v2
We have not added the support of user-configurability which your patch-set does.
Many thanks
Salil.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v1 0/5] target/arm: Handle psci calls in userspace
2023-07-04 9:58 ` Salil Mehta via
@ 2023-07-13 0:27 ` Gavin Shan
0 siblings, 0 replies; 12+ messages in thread
From: Gavin Shan @ 2023-07-13 0:27 UTC (permalink / raw)
To: Salil Mehta, Shaoqin Huang, qemu-devel@nongnu.org,
qemu-arm@nongnu.org
Cc: oliver.upton@linux.dev, james.morse@arm.com, Cornelia Huck,
kvm@vger.kernel.org, Michael S. Tsirkin, Paolo Bonzini,
Peter Maydell, Salil Mehta
Hi Salil,
On 7/4/23 19:58, Salil Mehta wrote:
>
> Latest Qemu Prototype (Pre RFC V2) (Not in the final shape of the patches)
> https://github.com/salil-mehta/qemu.git virt-cpuhp-armv8/rfc-v1-port11052023.dev-1
>
>
> should work against below kernel changes as confirmed by James,
>
> Latest Kernel Prototype (Pre RFC V2 = RFC V1 + Fixes)
> https://git.gitlab.arm.com/linux-arm/linux-jm.git virtual_cpu_hotplug/rfc/v2
>
I think it'd better to have the discussions through maillist. The threads and all
follow-up replies can be cached somewhere to avoid lost. Besides, other people may
be intrested in the same points and can join the discussion directly.
I got a chance to give the RFC patchsets some tests. Not all cases are working
as expected. I know the patchset is being polished. I'm summarize them as below:
(1) coredump is triggered when the topology is out of range. It's the issue we
discussed in private. Here I'm just recapping in case other people also blocked
by the issue.
(a) start VM with the following command lines
/home/gavin/sandbox/qemu.main/build/qemu-system-aarch64 \
-accel kvm -machine virt,gic-version=host,nvdimm=on -cpu host \
-smp cpus=1,maxcpus=2,sockets=1,clusters=1,cores=1,threads=2 \
-m 512M,slots=16,maxmem=64G \
-object memory-backend-ram,id=mem0,size=512M \
-numa node,nodeid=0,cpus=0-1,memdev=mem0 \
(b) hot add CPU whose topology is out of range
(qemu) device_add driver=host-arm-cpu,id=cpu1,core-id=1
It's actually caused by typos in hw/arm/virt.c::virt_cpu_pre_plug() where
'ms->possible_cpus->len' needs to be replaced with 'ms->smp.cores'. With this,
the hot-added CPU object will be rejected.
(2) I don't think TCG has been tested since it seems not working at all.
(a) start VM with the following command lines
/home/gshan/sandbox/src/qemu/main/build/qemu-system-aarch64 \
-machine virt,gic-version=3 -cpu max -m 1024 \
-smp maxcpus=2,cpus=1,sockets=1,clusters=1,cores=1,threads=2 \
(b) failure while hot-adding CPU
(qemu) device_add driver=max-arm-cpu,id=cpu1,thread-id=1
Error: cpu(id1=0:0:0:1) with arch-id 1 exists
The error message is printed by hw/arm/virt.c::virt_cpu_pre_plug() where the
specific CPU has been presented. For KVM case, the disabled CPUs are detached
from 'ms->possible_cpu->cpus[1].cpu' and destroyed. I think we need to do similar
thing for TCG case in hw/arm/virt.c::virt_cpu_post_init(). I'm able to add CPU
with the following hunk of changes.
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -2122,6 +2122,18 @@ static void virt_cpu_post_init(VirtMachineState *vms, MemoryRegion *sysmem)
exit(1);
}
}
+
+#if 1
+ for (n = 0; n < possible_cpus->len; n++) {
+ cpu = qemu_get_possible_cpu(n);
+ if (!qemu_enabled_cpu(cpu)) {
+ CPUArchId *cpu_slot;
+ cpu_slot = virt_find_cpu_slot(ms, cpu->cpu_index);
+ cpu_slot->cpu = NULL;
+ object_unref(OBJECT(cpu));
+ }
+ }
+#endif
}
}
(3) Assertion on following the sequence of hot-add, hot-remove and hot-add when TCG mode is enabled.
(a) Include the hack from (2) and start VM with the following command lines
/home/gshan/sandbox/src/qemu/main/build/qemu-system-aarch64 \
-machine virt,gic-version=3 -cpu max -m 1024 \
-smp maxcpus=2,cpus=1,sockets=1,clusters=1,cores=1,threads=2 \
(b) assertion on the sequence of hot-add, hot-remove and hot-add
(qemu) device_add driver=max-arm-cpu,id=cpu1,thread-id=1
(qemu) device_del cpu1
(qemu) device_add driver=max-arm-cpu,id=cpu1,thread-id=1
**
ERROR:../tcg/tcg.c:669:tcg_register_thread: assertion failed: (n < tcg_max_ctxs)
Bail out! ERROR:../tcg/tcg.c:669:tcg_register_thread: assertion failed: (n < tcg_max_ctxs)
Aborted (core dumped)
I'm not sure if x86 has similar issue. It seems the management for TCG contexts, corresponding
to variable @tcg_max_ctxs and @tcg_ctxs need some improvements for better TCG context registration
and unregistration to accomodate CPU hotplug.
Apart from what have been found in the tests, I've started to look into the code changes. I may
reply with more specific comments. However, it would be ideal to comment on the specific changes
after the patchset is posted for review. Salil, the plan may have been mentioned by you somewhere.
As I understood, the QEMU patchset will be posted after James's RFCv2 kernel series is posted.
Please let me know if my understanding is correct. Again, thanks for your efforts to make vCPU
hotplug to be supported :)
Thanks,
Gavin
^ permalink raw reply [flat|nested] 12+ messages in thread