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Tsirkin" To: Igor Mammedov Cc: qemu-devel@nongnu.org, Peter Maydell , BALATON Zoltan , Ani Sinha Subject: Re: [PULL 30/53] hw/acpi: Fix PM control register access Message-ID: <20230626094900-mutt-send-email-mst@kernel.org> References: <3d563fc68732179b86eff2b87f2d7dbef150315f.1687782442.git.mst@redhat.com> <20230626152009.13c7b66a@imammedo.users.ipa.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230626152009.13c7b66a@imammedo.users.ipa.redhat.com> Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Mon, Jun 26, 2023 at 03:20:09PM +0200, Igor Mammedov wrote: > On Mon, 26 Jun 2023 08:29:19 -0400 > "Michael S. Tsirkin" wrote: > > > From: BALATON Zoltan > > > > On pegasos2 which has ACPI as part of VT8231 south bridge the board > > firmware writes PM control register by accessing the second byte so > > addr will be 1. This wasn't handled correctly and the write went to > > addr 0 instead. Remove the acpi_pm1_cnt_write() function which is used > > only once and does not take addr into account and handle non-zero > > address in acpi_pm_cnt_{read|write}. This fixes ACPI shutdown with > > pegasos2 firmware. > > > > The issue below is possibly related to the same memory core bug. > > > > Link: https://gitlab.com/qemu-project/qemu/-/issues/360 > > Signed-off-by: BALATON Zoltan > > Message-Id: <20230607200125.A9988746377@zero.eik.bme.hu> > > Reviewed-by: Michael S. Tsirkin > > Signed-off-by: Michael S. Tsirkin > > Somewhere you lost mine > Reviewed-by: Igor Mammedov You are right, sorry. fixed now. > > --- > > hw/acpi/core.c | 56 +++++++++++++++++++++++++------------------------- > > 1 file changed, 28 insertions(+), 28 deletions(-) > > > > diff --git a/hw/acpi/core.c b/hw/acpi/core.c > > index 6da275c599..00b1e79a30 100644 > > --- a/hw/acpi/core.c > > +++ b/hw/acpi/core.c > > @@ -551,8 +551,35 @@ void acpi_pm_tmr_reset(ACPIREGS *ar) > > } > > > > /* ACPI PM1aCNT */ > > -static void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val) > > +void acpi_pm1_cnt_update(ACPIREGS *ar, > > + bool sci_enable, bool sci_disable) > > { > > + /* ACPI specs 3.0, 4.7.2.5 */ > > + if (ar->pm1.cnt.acpi_only) { > > + return; > > + } > > + > > + if (sci_enable) { > > + ar->pm1.cnt.cnt |= ACPI_BITMASK_SCI_ENABLE; > > + } else if (sci_disable) { > > + ar->pm1.cnt.cnt &= ~ACPI_BITMASK_SCI_ENABLE; > > + } > > +} > > + > > +static uint64_t acpi_pm_cnt_read(void *opaque, hwaddr addr, unsigned width) > > +{ > > + ACPIREGS *ar = opaque; > > + return ar->pm1.cnt.cnt >> addr * 8; > > +} > > + > > +static void acpi_pm_cnt_write(void *opaque, hwaddr addr, uint64_t val, > > + unsigned width) > > +{ > > + ACPIREGS *ar = opaque; > > + > > + if (addr == 1) { > > + val = val << 8 | (ar->pm1.cnt.cnt & 0xff); > > + } > > ar->pm1.cnt.cnt = val & ~(ACPI_BITMASK_SLEEP_ENABLE); > > > > if (val & ACPI_BITMASK_SLEEP_ENABLE) { > > @@ -575,33 +602,6 @@ static void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val) > > } > > } > > > > -void acpi_pm1_cnt_update(ACPIREGS *ar, > > - bool sci_enable, bool sci_disable) > > -{ > > - /* ACPI specs 3.0, 4.7.2.5 */ > > - if (ar->pm1.cnt.acpi_only) { > > - return; > > - } > > - > > - if (sci_enable) { > > - ar->pm1.cnt.cnt |= ACPI_BITMASK_SCI_ENABLE; > > - } else if (sci_disable) { > > - ar->pm1.cnt.cnt &= ~ACPI_BITMASK_SCI_ENABLE; > > - } > > -} > > - > > -static uint64_t acpi_pm_cnt_read(void *opaque, hwaddr addr, unsigned width) > > -{ > > - ACPIREGS *ar = opaque; > > - return ar->pm1.cnt.cnt; > > -} > > - > > -static void acpi_pm_cnt_write(void *opaque, hwaddr addr, uint64_t val, > > - unsigned width) > > -{ > > - acpi_pm1_cnt_write(opaque, val); > > -} > > - > > static const MemoryRegionOps acpi_pm_cnt_ops = { > > .read = acpi_pm_cnt_read, > > .write = acpi_pm_cnt_write,