Re: [PATCH 4/7] target/i386: Add new bit definitions of MSR_IA32_ARCH_CAPABILITIES

[Igor Mammedov <imammedo@redhat.com>]

On Fri, 16 Jun 2023 11:23:08 +0800
Tao Su <tao1.su@linux.intel.com> wrote:

> Currently, bit 13, 14, 15 and 24 of MSR_IA32_ARCH_CAPABILITIES are
> disclosed for fixing security issues, so add those bit definitions
> and feature names.
> 
> Signed-off-by: Tao Su <tao1.su@linux.intel.com>

Reviewed-by: Igor Mammedov <imammedo@redhat.com>

> ---
>  target/i386/cpu.c | 4 ++--
>  target/i386/cpu.h | 4 ++++
>  2 files changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 7898a4c79a..b5321240c6 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -1069,10 +1069,10 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
>              "rdctl-no", "ibrs-all", "rsba", "skip-l1dfl-vmentry",
>              "ssb-no", "mds-no", "pschange-mc-no", "tsx-ctrl",
>              "taa-no", NULL, NULL, NULL,
> -            NULL, NULL, NULL, NULL,
> +            NULL, "sbdr-ssdp-no", "fbsdp-no", "psdp-no",
>              NULL, "fb-clear", NULL, NULL,
>              NULL, NULL, NULL, NULL,
> -            NULL, NULL, NULL, NULL,
> +            "pbrsb-no", NULL, NULL, NULL,
>              NULL, NULL, NULL, NULL,
>          },
>          .msr = {
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index 64d50acf41..6221b1c0a4 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -1022,7 +1022,11 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
>  #define MSR_ARCH_CAP_PSCHANGE_MC_NO     (1U << 6)
>  #define MSR_ARCH_CAP_TSX_CTRL_MSR       (1U << 7)
>  #define MSR_ARCH_CAP_TAA_NO             (1U << 8)
> +#define MSR_ARCH_CAP_SBDR_SSDP_NO       (1u << 13)
> +#define MSR_ARCH_CAP_FBSDP_NO           (1u << 14)
> +#define MSR_ARCH_CAP_PSDP_NO            (1u << 15)
>  #define MSR_ARCH_CAP_FB_CLEAR           (1U << 17)
> +#define MSR_ARCH_CAP_PBRSB_NO           (1U << 24)
>  
>  #define MSR_CORE_CAP_SPLIT_LOCK_DETECT  (1U << 5)
>