From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Bin Meng" <bin.meng@windriver.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Weiwei Li" <liweiwei@iscas.ac.cn>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
qemu-riscv@nongnu.org,
"Alistair Francis" <alistair.francis@wdc.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v2 2/4] target/riscv: Restrict sysemu specific header to user emulation
Date: Wed, 28 Jun 2023 08:32:32 +0200 [thread overview]
Message-ID: <20230628063234.32544-3-philmd@linaro.org> (raw)
In-Reply-To: <20230628063234.32544-1-philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/riscv/cpu.c | 8 +++++---
target/riscv/cpu_helper.c | 2 ++
target/riscv/csr.c | 2 ++
3 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index fb8458bf74..d9a3684b3e 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -23,9 +23,13 @@
#include "qemu/log.h"
#include "cpu.h"
#include "cpu_vendorid.h"
+#ifndef CONFIG_USER_ONLY
#include "pmu.h"
-#include "internals.h"
#include "time_helper.h"
+#include "sysemu/kvm.h"
+#include "kvm_riscv.h"
+#endif
+#include "internals.h"
#include "exec/exec-all.h"
#include "qapi/error.h"
#include "qapi/visitor.h"
@@ -33,8 +37,6 @@
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
#include "fpu/softfloat-helpers.h"
-#include "sysemu/kvm.h"
-#include "kvm_riscv.h"
#include "tcg/tcg.h"
/* RISC-V CPU definitions */
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 55c36025d7..3c28396eaf 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -28,7 +28,9 @@
#include "tcg/tcg-op.h"
#include "trace.h"
#include "semihosting/common-semi.h"
+#ifndef CONFIG_USER_ONLY
#include "sysemu/cpu-timers.h"
+#endif
#include "cpu_bits.h"
#include "debug.h"
#include "tcg/oversized-guest.h"
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index ea7585329e..e5737dcf58 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -21,8 +21,10 @@
#include "qemu/log.h"
#include "qemu/timer.h"
#include "cpu.h"
+#ifndef CONFIG_USER_ONLY
#include "pmu.h"
#include "time_helper.h"
+#endif
#include "qemu/main-loop.h"
#include "exec/exec-all.h"
#include "exec/tb-flush.h"
--
2.38.1
next prev parent reply other threads:[~2023-06-28 6:34 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-28 6:32 [PATCH v2 0/4] target/riscv: Misc header cleanups Philippe Mathieu-Daudé
2023-06-28 6:32 ` [PATCH v2 1/4] target/riscv: Remove unused 'instmap.h' header in translate.c Philippe Mathieu-Daudé
2023-06-30 12:14 ` Daniel Henrique Barboza
2023-06-28 6:32 ` Philippe Mathieu-Daudé [this message]
2023-06-30 12:15 ` [PATCH v2 2/4] target/riscv: Restrict sysemu specific header to user emulation Daniel Henrique Barboza
2023-06-28 6:32 ` [PATCH v2 3/4] target/riscv: Restrict 'rv128' machine to TCG accelerator Philippe Mathieu-Daudé
2023-06-30 12:15 ` Daniel Henrique Barboza
2023-06-28 6:32 ` [PATCH v2 4/4] target/riscv: Restrict riscv_cpu_do_interrupt() to sysemu Philippe Mathieu-Daudé
2023-06-30 12:15 ` Daniel Henrique Barboza
2023-07-03 1:29 ` [PATCH v2 0/4] target/riscv: Misc header cleanups Alistair Francis
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