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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PULL 12/30] accel: Rename NVMM 'struct qemu_vcpu' -> AccelCPUState
Date: Wed, 28 Jun 2023 17:52:55 +0200	[thread overview]
Message-ID: <20230628155313.71594-13-philmd@linaro.org> (raw)
In-Reply-To: <20230628155313.71594-1-philmd@linaro.org>

We want all accelerators to share the same opaque pointer in
CPUState. Rename NVMM 'qemu_vcpu' as 'AccelCPUState'; directly
use the typedef, remove unnecessary casts.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230624174121.11508-11-philmd@linaro.org>
---
 target/i386/nvmm/nvmm-all.c | 32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/target/i386/nvmm/nvmm-all.c b/target/i386/nvmm/nvmm-all.c
index 90e9e0a5b2..e5ee4af084 100644
--- a/target/i386/nvmm/nvmm-all.c
+++ b/target/i386/nvmm/nvmm-all.c
@@ -26,7 +26,7 @@
 
 #include <nvmm.h>
 
-struct qemu_vcpu {
+struct AccelCPUState {
     struct nvmm_vcpu vcpu;
     uint8_t tpr;
     bool stop;
@@ -49,10 +49,10 @@ struct qemu_machine {
 static bool nvmm_allowed;
 static struct qemu_machine qemu_mach;
 
-static struct qemu_vcpu *
+static AccelCPUState *
 get_qemu_vcpu(CPUState *cpu)
 {
-    return (struct qemu_vcpu *)cpu->accel;
+    return cpu->accel;
 }
 
 static struct nvmm_machine *
@@ -86,7 +86,7 @@ nvmm_set_registers(CPUState *cpu)
 {
     CPUX86State *env = cpu->env_ptr;
     struct nvmm_machine *mach = get_nvmm_mach();
-    struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+    AccelCPUState *qcpu = get_qemu_vcpu(cpu);
     struct nvmm_vcpu *vcpu = &qcpu->vcpu;
     struct nvmm_x64_state *state = vcpu->state;
     uint64_t bitmap;
@@ -223,7 +223,7 @@ nvmm_get_registers(CPUState *cpu)
 {
     CPUX86State *env = cpu->env_ptr;
     struct nvmm_machine *mach = get_nvmm_mach();
-    struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+    AccelCPUState *qcpu = get_qemu_vcpu(cpu);
     struct nvmm_vcpu *vcpu = &qcpu->vcpu;
     X86CPU *x86_cpu = X86_CPU(cpu);
     struct nvmm_x64_state *state = vcpu->state;
@@ -347,7 +347,7 @@ static bool
 nvmm_can_take_int(CPUState *cpu)
 {
     CPUX86State *env = cpu->env_ptr;
-    struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+    AccelCPUState *qcpu = get_qemu_vcpu(cpu);
     struct nvmm_vcpu *vcpu = &qcpu->vcpu;
     struct nvmm_machine *mach = get_nvmm_mach();
 
@@ -372,7 +372,7 @@ nvmm_can_take_int(CPUState *cpu)
 static bool
 nvmm_can_take_nmi(CPUState *cpu)
 {
-    struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+    AccelCPUState *qcpu = get_qemu_vcpu(cpu);
 
     /*
      * Contrary to INTs, NMIs always schedule an exit when they are
@@ -395,7 +395,7 @@ nvmm_vcpu_pre_run(CPUState *cpu)
 {
     CPUX86State *env = cpu->env_ptr;
     struct nvmm_machine *mach = get_nvmm_mach();
-    struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+    AccelCPUState *qcpu = get_qemu_vcpu(cpu);
     struct nvmm_vcpu *vcpu = &qcpu->vcpu;
     X86CPU *x86_cpu = X86_CPU(cpu);
     struct nvmm_x64_state *state = vcpu->state;
@@ -478,7 +478,7 @@ nvmm_vcpu_pre_run(CPUState *cpu)
 static void
 nvmm_vcpu_post_run(CPUState *cpu, struct nvmm_vcpu_exit *exit)
 {
-    struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+    AccelCPUState *qcpu = get_qemu_vcpu(cpu);
     CPUX86State *env = cpu->env_ptr;
     X86CPU *x86_cpu = X86_CPU(cpu);
     uint64_t tpr;
@@ -565,7 +565,7 @@ static int
 nvmm_handle_rdmsr(struct nvmm_machine *mach, CPUState *cpu,
     struct nvmm_vcpu_exit *exit)
 {
-    struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+    AccelCPUState *qcpu = get_qemu_vcpu(cpu);
     struct nvmm_vcpu *vcpu = &qcpu->vcpu;
     X86CPU *x86_cpu = X86_CPU(cpu);
     struct nvmm_x64_state *state = vcpu->state;
@@ -610,7 +610,7 @@ static int
 nvmm_handle_wrmsr(struct nvmm_machine *mach, CPUState *cpu,
     struct nvmm_vcpu_exit *exit)
 {
-    struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+    AccelCPUState *qcpu = get_qemu_vcpu(cpu);
     struct nvmm_vcpu *vcpu = &qcpu->vcpu;
     X86CPU *x86_cpu = X86_CPU(cpu);
     struct nvmm_x64_state *state = vcpu->state;
@@ -686,7 +686,7 @@ nvmm_vcpu_loop(CPUState *cpu)
 {
     CPUX86State *env = cpu->env_ptr;
     struct nvmm_machine *mach = get_nvmm_mach();
-    struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+    AccelCPUState *qcpu = get_qemu_vcpu(cpu);
     struct nvmm_vcpu *vcpu = &qcpu->vcpu;
     X86CPU *x86_cpu = X86_CPU(cpu);
     struct nvmm_vcpu_exit *exit = vcpu->exit;
@@ -892,7 +892,7 @@ static void
 nvmm_ipi_signal(int sigcpu)
 {
     if (current_cpu) {
-        struct qemu_vcpu *qcpu = get_qemu_vcpu(current_cpu);
+        AccelCPUState *qcpu = get_qemu_vcpu(current_cpu);
 #if NVMM_USER_VERSION >= 2
         struct nvmm_vcpu *vcpu = &qcpu->vcpu;
         nvmm_vcpu_stop(vcpu);
@@ -926,7 +926,7 @@ nvmm_init_vcpu(CPUState *cpu)
     struct nvmm_vcpu_conf_cpuid cpuid;
     struct nvmm_vcpu_conf_tpr tpr;
     Error *local_error = NULL;
-    struct qemu_vcpu *qcpu;
+    AccelCPUState *qcpu;
     int ret, err;
 
     nvmm_init_cpu_signals();
@@ -942,7 +942,7 @@ nvmm_init_vcpu(CPUState *cpu)
         }
     }
 
-    qcpu = g_malloc0(sizeof(*qcpu));
+    qcpu = g_new0(AccelCPUState, 1);
 
     ret = nvmm_vcpu_create(mach, cpu->cpu_index, &qcpu->vcpu);
     if (ret == -1) {
@@ -1023,7 +1023,7 @@ void
 nvmm_destroy_vcpu(CPUState *cpu)
 {
     struct nvmm_machine *mach = get_nvmm_mach();
-    struct qemu_vcpu *qcpu = get_qemu_vcpu(cpu);
+    AccelCPUState *qcpu = get_qemu_vcpu(cpu);
 
     nvmm_vcpu_destroy(mach, &qcpu->vcpu);
     g_free(cpu->accel);
-- 
2.38.1



  parent reply	other threads:[~2023-06-28 16:00 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-28 15:52 [PULL 00/30] Accelerator patches for 2023-06-28 Philippe Mathieu-Daudé
2023-06-28 15:52 ` [PULL 01/30] MAINTAINERS: Update Roman Bolshakov email address Philippe Mathieu-Daudé
2023-06-28 15:52 ` [PULL 02/30] docs/devel/testing: Update the 'Docker Debugging' section Philippe Mathieu-Daudé
2023-06-28 15:52 ` [PULL 03/30] accel: Re-enable WHPX cross-build on case sensitive filesystems Philippe Mathieu-Daudé
2023-06-28 15:52 ` [PULL 04/30] accel: Document generic accelerator headers Philippe Mathieu-Daudé
2023-06-28 15:52 ` [PULL 05/30] accel: Remove unused hThread variable on TCG/WHPX Philippe Mathieu-Daudé
2023-06-28 15:52 ` [PULL 06/30] accel: Fix a leak on Windows HAX Philippe Mathieu-Daudé
2023-06-28 15:52 ` [PULL 07/30] accel: Destroy HAX vCPU threads once done Philippe Mathieu-Daudé
2023-06-28 15:52 ` [PULL 08/30] accel: Rename 'hax_vcpu' as 'accel' in CPUState Philippe Mathieu-Daudé
2023-06-28 15:52 ` [PULL 09/30] accel: Rename HAX 'struct hax_vcpu_state' -> AccelCPUState Philippe Mathieu-Daudé
2023-06-28 15:52 ` [PULL 10/30] accel: Move HAX hThread to accelerator context Philippe Mathieu-Daudé
2023-06-28 15:52 ` [PULL 11/30] accel: Remove NVMM unreachable error path Philippe Mathieu-Daudé
2023-06-28 15:52 ` Philippe Mathieu-Daudé [this message]
2023-06-28 15:52 ` [PULL 13/30] accel: Inline NVMM get_qemu_vcpu() Philippe Mathieu-Daudé
2023-06-28 15:52 ` [PULL 14/30] accel: Remove WHPX unreachable error path Philippe Mathieu-Daudé
2023-06-28 15:52 ` [PULL 15/30] accel: Rename WHPX 'struct whpx_vcpu' -> AccelCPUState Philippe Mathieu-Daudé
2023-06-28 15:52 ` [PULL 16/30] accel: Inline WHPX get_whpx_vcpu() Philippe Mathieu-Daudé
2023-06-28 15:53 ` [PULL 17/30] accel: Rename 'cpu_state' -> 'cs' Philippe Mathieu-Daudé
2023-06-28 15:53 ` [PULL 18/30] accel: Rename HVF 'struct hvf_vcpu_state' -> AccelCPUState Philippe Mathieu-Daudé
2023-06-28 15:53 ` [PULL 19/30] accel/kvm: Re-include "exec/memattrs.h" header Philippe Mathieu-Daudé
2023-06-28 15:53 ` [PULL 20/30] accel/kvm: Declare kvm_direct_msi_allowed in stubs Philippe Mathieu-Daudé
2023-06-28 15:53 ` [PULL 21/30] hw/intc/arm_gic: Un-inline GIC*/ITS class_name() helpers Philippe Mathieu-Daudé
2023-06-28 15:53 ` [PULL 22/30] hw/intc/arm_gic: Rename 'first_cpu' argument Philippe Mathieu-Daudé
2023-06-28 15:53 ` [PULL 23/30] hw/arm/sbsa-ref: Include missing 'sysemu/kvm.h' header Philippe Mathieu-Daudé
2023-06-28 15:53 ` [PULL 24/30] target/arm: Restrict KVM-specific fields from ArchCPU Philippe Mathieu-Daudé
2023-06-28 15:53 ` [PULL 25/30] target/ppc: " Philippe Mathieu-Daudé
2023-06-28 15:53 ` [PULL 26/30] target/riscv: " Philippe Mathieu-Daudé
2023-06-28 15:53 ` [PULL 27/30] target/i386/WHPX: Fix error message when fail to set ProcessorCount Philippe Mathieu-Daudé
2023-06-28 15:53 ` [PULL 28/30] exec/memory: Add symbolic value for memory listener priority for accel Philippe Mathieu-Daudé
2023-06-28 15:53 ` [PULL 29/30] exec/memory: Add symbol for memory listener priority for device backend Philippe Mathieu-Daudé
2023-06-28 15:53 ` [PULL 30/30] exec/memory: Add symbol for the min value of memory listener priority Philippe Mathieu-Daudé
2023-06-29 11:15 ` [PULL 00/30] Accelerator patches for 2023-06-28 Richard Henderson

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