From: Frederic Barrat <fbarrat@linux.ibm.com>
To: "Cédric Le Goater" <clg@kaod.org>,
"Daniel Henrique Barboza" <danielhb413@gmail.com>,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH 0/2] Fix PSIHB interrupts init PQ state
Date: Fri, 30 Jun 2023 16:42:40 +0200 [thread overview]
Message-ID: <20230630144243.214976-1-fbarrat@linux.ibm.com> (raw)
On P9 and 10, the real hardware defines the PQ state of the PSIHB
interrupts to be 0b00. Qemu defaults to 0b01.
It doesn't matter to skiboot, which doesn't rely on it and explicitly
masks the interrupts during intialization. But this patch fixes it,
just in case some other hypervisor checks it.
Frederic Barrat (2):
pnv/xive: Add property on xive sources to define PQ state on reset
pnv/psi: Initialize the PSIHB interrupts to match hardware
hw/intc/xive.c | 8 ++++++--
hw/ppc/pnv_psi.c | 2 ++
include/hw/ppc/xive.h | 1 +
3 files changed, 9 insertions(+), 2 deletions(-)
--
2.41.0
next reply other threads:[~2023-06-30 14:43 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-30 14:42 Frederic Barrat [this message]
2023-06-30 14:42 ` [PATCH 1/2] pnv/xive: Add property on xive sources to define PQ state on reset Frederic Barrat
2023-06-30 14:58 ` Cédric Le Goater
2023-06-30 14:42 ` [PATCH 2/2] pnv/psi: Initialize the PSIHB interrupts to match hardware Frederic Barrat
2023-06-30 14:59 ` Cédric Le Goater
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