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Tsirkin" To: Akihiko Odaki Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, Ani Sinha , Marcel Apfelbaum , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen Subject: Re: [PATCH v2 3/4] igb: Fix ARI next function numbers Message-ID: <20230702063136-mutt-send-email-mst@kernel.org> References: <20230702094631.39111-1-akihiko.odaki@daynix.com> <20230702094631.39111-4-akihiko.odaki@daynix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230702094631.39111-4-akihiko.odaki@daynix.com> Received-SPF: pass client-ip=170.10.133.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Sun, Jul 02, 2023 at 06:46:27PM +0900, Akihiko Odaki wrote: > The ARI next function number field is undefined for VF so the PF should > end the linked list formed with the field by specifying 0. > > Fixes: 3a977deebe ("Intrdocue igb device emulation") > Signed-off-by: Akihiko Odaki > --- > hw/core/machine.c | 3 ++- > hw/net/igb.c | 5 ++++- > 2 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/hw/core/machine.c b/hw/core/machine.c > index f984a767a2..1f5aacd1dc 100644 > --- a/hw/core/machine.c > +++ b/hw/core/machine.c > @@ -41,7 +41,8 @@ > > GlobalProperty hw_compat_8_0[] = { > { "migration", "multifd-flush-after-each-section", "on"}, > - { "nvme", "ari-nextfn-1", "on"}, > + { "igb", "ari-nextfn-1", "on" }, > + { "nvme", "ari-nextfn-1", "on" }, > }; > const size_t hw_compat_8_0_len = G_N_ELEMENTS(hw_compat_8_0); > > diff --git a/hw/net/igb.c b/hw/net/igb.c > index 1c989d7677..d37d43c155 100644 > --- a/hw/net/igb.c > +++ b/hw/net/igb.c > @@ -78,6 +78,8 @@ struct IGBState { > uint32_t ioaddr; > > IGBCore core; > + > + bool ari_nextfn_1; Document this field please, explaining why it's there. > }; > > #define IGB_CAP_SRIOV_OFFSET (0x160) > @@ -431,7 +433,7 @@ static void igb_pci_realize(PCIDevice *pci_dev, Error **errp) > hw_error("Failed to initialize AER capability"); > } > > - pcie_ari_init(pci_dev, 0x150, 1); > + pcie_ari_init(pci_dev, 0x150, s->ari_nextfn_1 ? 1 : 0); Why don't we move the logic to pci core, and drop code duplication completely? > > pcie_sriov_pf_init(pci_dev, IGB_CAP_SRIOV_OFFSET, TYPE_IGBVF, > IGB_82576_VF_DEV_ID, IGB_MAX_VF_FUNCTIONS, IGB_MAX_VF_FUNCTIONS, > @@ -582,6 +584,7 @@ static const VMStateDescription igb_vmstate = { > > static Property igb_properties[] = { > DEFINE_NIC_PROPERTIES(IGBState, conf), > + DEFINE_PROP_BOOL("ari-nextfn-1", IGBState, ari_nextfn_1, false), > DEFINE_PROP_END_OF_LIST(), > }; This really needs to be a non stable property (prefix with "x-"). > -- > 2.41.0