From: "Michael S. Tsirkin" <mst@redhat.com>
To: Akihiko Odaki <akihiko.odaki@daynix.com>
Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org,
Ani Sinha <anisinha@redhat.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Sriram Yagnaraman <sriram.yagnaraman@est.tech>,
Jason Wang <jasowang@redhat.com>, Keith Busch <kbusch@kernel.org>,
Klaus Jensen <its@irrelevant.dk>
Subject: Re: [PATCH v2 1/4] docs: Fix next function numbers in SR/IOV documentation
Date: Sun, 2 Jul 2023 09:24:31 -0400 [thread overview]
Message-ID: <20230702092412-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <611d209e-0fd7-5e72-7f25-61fc88ec1a2f@daynix.com>
On Sun, Jul 02, 2023 at 08:19:43PM +0900, Akihiko Odaki wrote:
> On 2023/07/02 19:40, Michael S. Tsirkin wrote:
> > On Sun, Jul 02, 2023 at 06:46:25PM +0900, Akihiko Odaki wrote:
> > > The ARI next function number field is undefined for VF so the PF should
> > > end the linked list formed with the field by specifying 0.
> > >
> > > This also changes the value of the field for VF; it seems to imply the
> > > value has some meaning if it differs from one of the PF, but it doesn't.
> > >
> > > Fixes: 2503461691 ("pcie: Add some SR/IOV API documentation in docs/pcie_sriov.txt")
> > > Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
> > > ---
> > > docs/pcie_sriov.txt | 4 ++--
> > > 1 file changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/docs/pcie_sriov.txt b/docs/pcie_sriov.txt
> > > index 7eff7f2703..2b7094dc47 100644
> > > --- a/docs/pcie_sriov.txt
> > > +++ b/docs/pcie_sriov.txt
> > > @@ -48,7 +48,7 @@ setting up a BAR for a VF.
> > > ...
> > > int ret = pcie_endpoint_cap_init(d, 0x70);
> > > ...
> > > - pcie_ari_init(d, 0x100, 1);
> > > + pcie_ari_init(d, 0x100, 0);
> > > ...
> > > /* Add and initialize the SR/IOV capability */
> > > @@ -78,7 +78,7 @@ setting up a BAR for a VF.
> > > ...
> > > int ret = pcie_endpoint_cap_init(d, 0x60);
> > > ...
> > > - pcie_ari_init(d, 0x100, 1);
> > > + pcie_ari_init(d, 0x100, 0);
> > > ...
> > > memory_region_init(mr, ... )
> > > pcie_sriov_vf_register_bar(d, bar_nr, mr);
> >
> >
> > So now code does not match docs.
>
> Can you elaborate more?
your new revision addresses this.
--
MST
next prev parent reply other threads:[~2023-07-02 13:25 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-02 9:46 [PATCH v2 0/4] pcie: Fix ARI next function numbers Akihiko Odaki
2023-07-02 9:46 ` [PATCH v2 1/4] docs: Fix next function numbers in SR/IOV documentation Akihiko Odaki
2023-07-02 10:40 ` Michael S. Tsirkin
2023-07-02 11:19 ` Akihiko Odaki
2023-07-02 13:24 ` Michael S. Tsirkin [this message]
2023-07-02 9:46 ` [PATCH v2 2/4] hw/nvme: Fix ARI next function numbers Akihiko Odaki
2023-07-02 9:46 ` [PATCH v2 3/4] igb: " Akihiko Odaki
2023-07-02 10:33 ` Michael S. Tsirkin
2023-07-02 9:46 ` [PATCH v2 4/4] pcie: Note a caveat regarding ARI next function number Akihiko Odaki
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