From: Nicholas Piggin <npiggin@gmail.com>
To: "Daniel Henrique Barboza" <danielhb413@gmail.com>,
"Joel Stanley" <joel@jms.id.au>,
"Cédric Le Goater" <clg@kaod.org>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Frédéric Barrat" <fbarrat@linux.ibm.com>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Subject: [PATCH v2 1/2] ppc/pnv: Set P10 core xscom region size to match hardware
Date: Thu, 6 Jul 2023 15:39:22 +1000 [thread overview]
Message-ID: <20230706053923.115003-2-npiggin@gmail.com> (raw)
In-Reply-To: <20230706053923.115003-1-npiggin@gmail.com>
The P10 core xscom memory regions overlap because the size is wrong.
The P10 core+L2 xscom region size is allocated as 0x1000 (with some
unused ranges). "EC" is used as a closer match, as "EX" includes L3
which has a disjoint xscom range that would require a different
region if it were implemented.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
hw/ppc/pnv_core.c | 6 ++++--
include/hw/ppc/pnv_core.h | 1 +
include/hw/ppc/pnv_xscom.h | 2 +-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index 8a72171ce0..aa363e4b85 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -296,9 +296,8 @@ static void pnv_core_realize(DeviceState *dev, Error **errp)
}
snprintf(name, sizeof(name), "xscom-core.%d", cc->core_id);
- /* TODO: check PNV_XSCOM_EX_SIZE for p10 */
pnv_xscom_region_init(&pc->xscom_regs, OBJECT(dev), pcc->xscom_ops,
- pc, name, PNV_XSCOM_EX_SIZE);
+ pc, name, pcc->xscom_size);
qemu_register_reset(pnv_core_reset, pc);
return;
@@ -350,6 +349,7 @@ static void pnv_core_power8_class_init(ObjectClass *oc, void *data)
PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
pcc->xscom_ops = &pnv_core_power8_xscom_ops;
+ pcc->xscom_size = PNV_XSCOM_EX_SIZE;
}
static void pnv_core_power9_class_init(ObjectClass *oc, void *data)
@@ -357,6 +357,7 @@ static void pnv_core_power9_class_init(ObjectClass *oc, void *data)
PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
pcc->xscom_ops = &pnv_core_power9_xscom_ops;
+ pcc->xscom_size = PNV_XSCOM_EX_SIZE;
}
static void pnv_core_power10_class_init(ObjectClass *oc, void *data)
@@ -364,6 +365,7 @@ static void pnv_core_power10_class_init(ObjectClass *oc, void *data)
PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
pcc->xscom_ops = &pnv_core_power10_xscom_ops;
+ pcc->xscom_size = PNV10_XSCOM_EC_SIZE;
}
static void pnv_core_class_init(ObjectClass *oc, void *data)
diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
index 77ef00f47a..aa5ca281fc 100644
--- a/include/hw/ppc/pnv_core.h
+++ b/include/hw/ppc/pnv_core.h
@@ -46,6 +46,7 @@ struct PnvCoreClass {
DeviceClass parent_class;
const MemoryRegionOps *xscom_ops;
+ uint64_t xscom_size;
};
#define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE
diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h
index f7da9a1dc6..a4c9d95dc5 100644
--- a/include/hw/ppc/pnv_xscom.h
+++ b/include/hw/ppc/pnv_xscom.h
@@ -133,7 +133,7 @@ struct PnvXScomInterfaceClass {
#define PNV10_XSCOM_EC_BASE(core) \
((uint64_t) PNV10_XSCOM_EQ_BASE(core) | PNV10_XSCOM_EC(core & 0x3))
-#define PNV10_XSCOM_EC_SIZE 0x100000
+#define PNV10_XSCOM_EC_SIZE 0x1000
#define PNV10_XSCOM_PSIHB_BASE 0x3011D00
#define PNV10_XSCOM_PSIHB_SIZE 0x100
--
2.40.1
next prev parent reply other threads:[~2023-07-06 5:40 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-06 5:39 [PATCH v2 0/2] ppc/pnv: Set P10 core xscom region size to match hardware Nicholas Piggin
2023-07-06 5:39 ` Nicholas Piggin [this message]
2023-07-06 5:39 ` [PATCH v2 2/2] tests/qtest: Add xscom tests for powernv10 machine Nicholas Piggin
2023-07-06 6:21 ` [PATCH v2 0/2] ppc/pnv: Set P10 core xscom region size to match hardware Cédric Le Goater
2023-07-06 7:19 ` Cédric Le Goater
2023-07-07 7:20 ` Daniel Henrique Barboza
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