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From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com,
	peter.maydell@linaro.org, richard.henderson@linaro.org,
	"Frederic Barrat" <fbarrat@linux.ibm.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PULL 20/60] pnv/xive: Add property on xive sources to define PQ state on reset
Date: Fri,  7 Jul 2023 08:30:28 -0300	[thread overview]
Message-ID: <20230707113108.7145-21-danielhb413@gmail.com> (raw)
In-Reply-To: <20230707113108.7145-1-danielhb413@gmail.com>

From: Frederic Barrat <fbarrat@linux.ibm.com>

The PQ state of a xive interrupt is always initialized to Q=1, which
means the interrupt is disabled. Since a xive source can be embedded
in many objects, this patch adds a property to allow that behavior to
be refined if needed.

Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20230703081215.55252-2-fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
 hw/intc/xive.c        | 8 ++++++--
 include/hw/ppc/xive.h | 1 +
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 84c079b034..f60c878345 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -1232,8 +1232,7 @@ static void xive_source_reset(void *dev)
 
     /* Do not clear the LSI bitmap */
 
-    /* PQs are initialized to 0b01 (Q=1) which corresponds to "ints off" */
-    memset(xsrc->status, XIVE_ESB_OFF, xsrc->nr_irqs);
+    memset(xsrc->status, xsrc->reset_pq, xsrc->nr_irqs);
 }
 
 static void xive_source_realize(DeviceState *dev, Error **errp)
@@ -1287,6 +1286,11 @@ static Property xive_source_properties[] = {
     DEFINE_PROP_UINT64("flags", XiveSource, esb_flags, 0),
     DEFINE_PROP_UINT32("nr-irqs", XiveSource, nr_irqs, 0),
     DEFINE_PROP_UINT32("shift", XiveSource, esb_shift, XIVE_ESB_64K_2PAGE),
+    /*
+     * By default, PQs are initialized to 0b01 (Q=1) which corresponds
+     * to "ints off"
+     */
+    DEFINE_PROP_UINT8("reset-pq", XiveSource, reset_pq, XIVE_ESB_OFF),
     DEFINE_PROP_LINK("xive", XiveSource, xive, TYPE_XIVE_NOTIFIER,
                      XiveNotifier *),
     DEFINE_PROP_END_OF_LIST(),
diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index 3dfb06e002..9f580a2699 100644
--- a/include/hw/ppc/xive.h
+++ b/include/hw/ppc/xive.h
@@ -187,6 +187,7 @@ struct XiveSource {
 
     /* PQ bits and LSI assertion bit */
     uint8_t         *status;
+    uint8_t         reset_pq; /* PQ state on reset */
 
     /* ESB memory region */
     uint64_t        esb_flags;
-- 
2.41.0



  parent reply	other threads:[~2023-07-07 11:48 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-07 11:30 [PULL 00/60] ppc queue Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 01/60] pnv/psi: Allow access to PSI registers through xscom Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 02/60] target/ppc: Make HDECR underflow edge triggered Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 03/60] hw/ppc: Fix clock update drift Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 04/60] target/ppc: Only generate decodetree files when TCG is enabled Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 05/60] mv64361: Add dummy gigabit ethernet PHY access registers Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 06/60] target/ppc: Tidy POWER book4 SPR registration Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 07/60] target/ppc: Add TFMR SPR implementation with read and write helpers Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 08/60] sungem: Add WOL MMIO Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 09/60] target/ppc: Fix icount access for some hypervisor instructions Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 10/60] tests/avocado: record_replay test for ppc powernv machine Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 11/60] pnv/xive2: Allow indirect TIMA accesses of all sizes Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 12/60] target/ppc: Remove some superfluous parentheses Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 13/60] target/ppc: Remove unneeded parameter from powerpc_reset_wakeup() Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 14/60] target/ppc: Move common check in exception handlers to a function Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 15/60] target/ppc: Remove some more local CPUState variables only used once Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 16/60] target/ppd: Remove unused define Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 17/60] target/ppc: Get CPUState in one step Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 18/60] target: ppc: Use MSR_HVB bit to get the target endianness for memory dump Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 19/60] pnv/xive2: Fix TIMA offset for indirect access Daniel Henrique Barboza
2023-07-07 11:30 ` Daniel Henrique Barboza [this message]
2023-07-07 11:30 ` [PULL 21/60] pnv/psi: Initialize the PSIHB interrupts to match hardware Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 22/60] ppc/pnv: quad xscom callbacks are P9 specific Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 23/60] ppc/pnv: Subclass quad xscom callbacks Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 24/60] ppc/pnv: Add P10 quad xscom model Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 25/60] ppc/pnv: Add P10 core " Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 26/60] ppc/pnv: Return zero for core thread state xscom Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 27/60] pnv/xive: Allow mmio operations of any size on the ESB CI pages Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 28/60] ppc/pegasos2: Add support for -initrd command line option Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 29/60] pnv/xive: Print CPU target in all TIMA traces Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 30/60] pnv/xive2: Always pass a presenter object when accessing the TIMA Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 31/60] target/ppc: Add LPAR-per-core vs per-thread mode flag Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 32/60] target/ppc: SMT support for the HID SPR Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 33/60] ppc/pnv: SMT support for powernv Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 34/60] tests/avocado: Add powernv machine test script Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 35/60] ppc440: Change ppc460ex_pcie_init() parameter type Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 36/60] ppc440: Add cpu link property to PCIe controller model Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 37/60] ppc440: Add a macro to shorten PCIe controller DCR registration Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 38/60] ppc440: Rename parent field of PPC460EXPCIEState to match code style Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 39/60] ppc440: Rename local variable in dcr_read_pcie() Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 40/60] ppc440: Stop using system io region for PCIe buses Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 41/60] ppc440: Add busnum property to PCIe controller model Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 42/60] ppc440: Remove ppc460ex_pcie_init legacy init function Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 43/60] ppc/sam460ex: Remove address_space_mem local variable Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 44/60] ppc440_pcix: Don't use iomem for regs Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 45/60] ppc440_pcix: Stop using system io region for PCI bus Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 46/60] ppc4xx_pci: Rename QOM type name define Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 47/60] ppc4xx_pci: Add define for ppc4xx-host-bridge type name Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 48/60] ppc440_pcix: Rename QOM type define abd move it to common header Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 49/60] ppc/pnv: Log all unimp warnings with similar message Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 50/60] ppc/pnv: Set P10 core xscom region size to match hardware Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 51/60] tests/qtest: Add xscom tests for powernv10 machine Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 52/60] target/ppc: Machine check on invalid real address access on POWER9/10 Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 53/60] target/ppc: Have 'kvm_ppc.h' include 'sysemu/kvm.h' Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 54/60] target/ppc: Reorder #ifdef'ry in kvm_ppc.h Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 55/60] target/ppc: Move CPU QOM definitions to cpu-qom.h Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 56/60] target/ppc: Define TYPE_HOST_POWERPC_CPU in cpu-qom.h Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 57/60] target/ppc: Restrict 'kvm_ppc.h' to sysemu in cpu_init.c Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 58/60] target/ppc: Remove pointless checks of CONFIG_USER_ONLY in 'kvm_ppc.h' Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 59/60] ppc/pnv: Add QME region for P10 Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 60/60] ppc: Enable 2nd DAWR support on p10 Daniel Henrique Barboza
2023-07-07 14:29 ` [PULL 00/60] ppc queue Daniel Henrique Barboza

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