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From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com,
	peter.maydell@linaro.org, richard.henderson@linaro.org,
	BALATON Zoltan <balaton@eik.bme.hu>
Subject: [PULL 46/60] ppc4xx_pci: Rename QOM type name define
Date: Fri,  7 Jul 2023 08:30:54 -0300	[thread overview]
Message-ID: <20230707113108.7145-47-danielhb413@gmail.com> (raw)
In-Reply-To: <20230707113108.7145-1-danielhb413@gmail.com>

From: BALATON Zoltan <balaton@eik.bme.hu>

Rename the TYPE_PPC4xx_PCI_HOST_BRIDGE define and its string value to
match each other and other similar types and to avoid confusion with
"ppc4xx-host-bridge" type defined in same file.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-ID: <c59c28ef440633dbd1de0bda0a93b7862ef91104.1688641673.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
 hw/ppc/ppc440_bamboo.c  | 3 +--
 hw/ppc/ppc4xx_pci.c     | 6 +++---
 include/hw/ppc/ppc4xx.h | 2 +-
 3 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
index f061b8cf3b..45f409c838 100644
--- a/hw/ppc/ppc440_bamboo.c
+++ b/hw/ppc/ppc440_bamboo.c
@@ -205,8 +205,7 @@ static void bamboo_init(MachineState *machine)
     ppc4xx_sdram_ddr_enable(PPC4xx_SDRAM_DDR(dev));
 
     /* PCI */
-    dev = sysbus_create_varargs(TYPE_PPC4xx_PCI_HOST_BRIDGE,
-                                PPC440EP_PCI_CONFIG,
+    dev = sysbus_create_varargs(TYPE_PPC4xx_PCI_HOST, PPC440EP_PCI_CONFIG,
                                 qdev_get_gpio_in(uicdev, pci_irq_nrs[0]),
                                 qdev_get_gpio_in(uicdev, pci_irq_nrs[1]),
                                 qdev_get_gpio_in(uicdev, pci_irq_nrs[2]),
diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c
index 1d4a50fa7c..fbdf8266d8 100644
--- a/hw/ppc/ppc4xx_pci.c
+++ b/hw/ppc/ppc4xx_pci.c
@@ -46,7 +46,7 @@ struct PCITargetMap {
     uint32_t la;
 };
 
-OBJECT_DECLARE_SIMPLE_TYPE(PPC4xxPCIState, PPC4xx_PCI_HOST_BRIDGE)
+OBJECT_DECLARE_SIMPLE_TYPE(PPC4xxPCIState, PPC4xx_PCI_HOST)
 
 #define PPC4xx_PCI_NR_PMMS 3
 #define PPC4xx_PCI_NR_PTMS 2
@@ -321,7 +321,7 @@ static void ppc4xx_pcihost_realize(DeviceState *dev, Error **errp)
     int i;
 
     h = PCI_HOST_BRIDGE(dev);
-    s = PPC4xx_PCI_HOST_BRIDGE(dev);
+    s = PPC4xx_PCI_HOST(dev);
 
     for (i = 0; i < ARRAY_SIZE(s->irq); i++) {
         sysbus_init_irq(sbd, &s->irq[i]);
@@ -386,7 +386,7 @@ static void ppc4xx_pcihost_class_init(ObjectClass *klass, void *data)
 }
 
 static const TypeInfo ppc4xx_pcihost_info = {
-    .name          = TYPE_PPC4xx_PCI_HOST_BRIDGE,
+    .name          = TYPE_PPC4xx_PCI_HOST,
     .parent        = TYPE_PCI_HOST_BRIDGE,
     .instance_size = sizeof(PPC4xxPCIState),
     .class_init    = ppc4xx_pcihost_class_init,
diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h
index 39ca602442..e053b9751b 100644
--- a/include/hw/ppc/ppc4xx.h
+++ b/include/hw/ppc/ppc4xx.h
@@ -29,7 +29,7 @@
 #include "exec/memory.h"
 #include "hw/sysbus.h"
 
-#define TYPE_PPC4xx_PCI_HOST_BRIDGE "ppc4xx-pcihost"
+#define TYPE_PPC4xx_PCI_HOST "ppc4xx-pci-host"
 #define TYPE_PPC460EX_PCIE_HOST "ppc460ex-pcie-host"
 
 /*
-- 
2.41.0



  parent reply	other threads:[~2023-07-07 11:48 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-07 11:30 [PULL 00/60] ppc queue Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 01/60] pnv/psi: Allow access to PSI registers through xscom Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 02/60] target/ppc: Make HDECR underflow edge triggered Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 03/60] hw/ppc: Fix clock update drift Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 04/60] target/ppc: Only generate decodetree files when TCG is enabled Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 05/60] mv64361: Add dummy gigabit ethernet PHY access registers Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 06/60] target/ppc: Tidy POWER book4 SPR registration Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 07/60] target/ppc: Add TFMR SPR implementation with read and write helpers Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 08/60] sungem: Add WOL MMIO Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 09/60] target/ppc: Fix icount access for some hypervisor instructions Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 10/60] tests/avocado: record_replay test for ppc powernv machine Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 11/60] pnv/xive2: Allow indirect TIMA accesses of all sizes Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 12/60] target/ppc: Remove some superfluous parentheses Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 13/60] target/ppc: Remove unneeded parameter from powerpc_reset_wakeup() Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 14/60] target/ppc: Move common check in exception handlers to a function Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 15/60] target/ppc: Remove some more local CPUState variables only used once Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 16/60] target/ppd: Remove unused define Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 17/60] target/ppc: Get CPUState in one step Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 18/60] target: ppc: Use MSR_HVB bit to get the target endianness for memory dump Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 19/60] pnv/xive2: Fix TIMA offset for indirect access Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 20/60] pnv/xive: Add property on xive sources to define PQ state on reset Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 21/60] pnv/psi: Initialize the PSIHB interrupts to match hardware Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 22/60] ppc/pnv: quad xscom callbacks are P9 specific Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 23/60] ppc/pnv: Subclass quad xscom callbacks Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 24/60] ppc/pnv: Add P10 quad xscom model Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 25/60] ppc/pnv: Add P10 core " Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 26/60] ppc/pnv: Return zero for core thread state xscom Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 27/60] pnv/xive: Allow mmio operations of any size on the ESB CI pages Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 28/60] ppc/pegasos2: Add support for -initrd command line option Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 29/60] pnv/xive: Print CPU target in all TIMA traces Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 30/60] pnv/xive2: Always pass a presenter object when accessing the TIMA Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 31/60] target/ppc: Add LPAR-per-core vs per-thread mode flag Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 32/60] target/ppc: SMT support for the HID SPR Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 33/60] ppc/pnv: SMT support for powernv Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 34/60] tests/avocado: Add powernv machine test script Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 35/60] ppc440: Change ppc460ex_pcie_init() parameter type Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 36/60] ppc440: Add cpu link property to PCIe controller model Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 37/60] ppc440: Add a macro to shorten PCIe controller DCR registration Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 38/60] ppc440: Rename parent field of PPC460EXPCIEState to match code style Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 39/60] ppc440: Rename local variable in dcr_read_pcie() Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 40/60] ppc440: Stop using system io region for PCIe buses Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 41/60] ppc440: Add busnum property to PCIe controller model Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 42/60] ppc440: Remove ppc460ex_pcie_init legacy init function Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 43/60] ppc/sam460ex: Remove address_space_mem local variable Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 44/60] ppc440_pcix: Don't use iomem for regs Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 45/60] ppc440_pcix: Stop using system io region for PCI bus Daniel Henrique Barboza
2023-07-07 11:30 ` Daniel Henrique Barboza [this message]
2023-07-07 11:30 ` [PULL 47/60] ppc4xx_pci: Add define for ppc4xx-host-bridge type name Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 48/60] ppc440_pcix: Rename QOM type define abd move it to common header Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 49/60] ppc/pnv: Log all unimp warnings with similar message Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 50/60] ppc/pnv: Set P10 core xscom region size to match hardware Daniel Henrique Barboza
2023-07-07 11:30 ` [PULL 51/60] tests/qtest: Add xscom tests for powernv10 machine Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 52/60] target/ppc: Machine check on invalid real address access on POWER9/10 Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 53/60] target/ppc: Have 'kvm_ppc.h' include 'sysemu/kvm.h' Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 54/60] target/ppc: Reorder #ifdef'ry in kvm_ppc.h Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 55/60] target/ppc: Move CPU QOM definitions to cpu-qom.h Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 56/60] target/ppc: Define TYPE_HOST_POWERPC_CPU in cpu-qom.h Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 57/60] target/ppc: Restrict 'kvm_ppc.h' to sysemu in cpu_init.c Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 58/60] target/ppc: Remove pointless checks of CONFIG_USER_ONLY in 'kvm_ppc.h' Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 59/60] ppc/pnv: Add QME region for P10 Daniel Henrique Barboza
2023-07-07 11:31 ` [PULL 60/60] ppc: Enable 2nd DAWR support on p10 Daniel Henrique Barboza
2023-07-07 14:29 ` [PULL 00/60] ppc queue Daniel Henrique Barboza

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