From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Evgeny Iakovlev" <eiakovlev@linux.microsoft.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Gavin Shan" <gshan@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
qemu-arm@nongnu.org, "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v2 09/11] hw/char/pl011: Check if receiver is enabled
Date: Mon, 10 Jul 2023 19:51:00 +0200 [thread overview]
Message-ID: <20230710175102.32429-10-philmd@linaro.org> (raw)
In-Reply-To: <20230710175102.32429-1-philmd@linaro.org>
Do not receive characters when UART or receiver are disabled.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/char/pl011.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index 03dce0a1ec..59d239cb83 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -77,6 +77,7 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr)
#define LCR_BRK (1 << 0)
/* Control Register, UARTCR */
+#define CR_RXE (1 << 9)
#define CR_TXE (1 << 8)
#define CR_UARTEN (1 << 0)
@@ -357,9 +358,11 @@ static void pl011_write(void *opaque, hwaddr offset,
static int pl011_can_receive(void *opaque)
{
PL011State *s = (PL011State *)opaque;
- int r;
+ int r = 0;
- r = s->read_count < pl011_get_fifo_depth(s);
+ if ((s->cr & CR_UARTEN) && (s->cr & CR_RXE)) {
+ r = s->read_count < pl011_get_fifo_depth(s);
+ }
trace_pl011_can_receive(s->lcr, s->read_count, r);
return r;
}
--
2.38.1
next prev parent reply other threads:[~2023-07-10 17:54 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-10 17:50 [PATCH v2 00/11] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
2023-07-10 17:50 ` [PATCH v2 01/11] hw/char/pl011: Restrict MemoryRegionOps implementation access sizes Philippe Mathieu-Daudé
2023-07-14 6:47 ` Richard Henderson
2023-07-10 17:50 ` [PATCH v2 02/11] hw/char/pl011: Display register name in trace events Philippe Mathieu-Daudé
2023-07-14 6:49 ` Richard Henderson
2023-07-10 17:50 ` [PATCH v2 03/11] hw/char/pl011: Remove duplicated PL011_INT_[RT]X definitions Philippe Mathieu-Daudé
2023-07-14 6:50 ` Richard Henderson
2023-07-10 17:50 ` [PATCH v2 04/11] hw/char/pl011: Replace magic values by register field definitions Philippe Mathieu-Daudé
2023-07-14 6:54 ` Richard Henderson
2023-07-10 17:50 ` [PATCH v2 05/11] hw/char/pl011: Split RX/TX path of pl011_reset_fifo() Philippe Mathieu-Daudé
2023-07-14 6:56 ` Richard Henderson
2023-07-10 17:50 ` [PATCH v2 06/11] hw/char/pl011: Extract pl011_write_txdata() from pl011_write() Philippe Mathieu-Daudé
2023-07-14 6:58 ` Richard Henderson
2023-10-12 13:07 ` Philippe Mathieu-Daudé
2023-10-12 14:25 ` Philippe Mathieu-Daudé
2023-07-10 17:50 ` [PATCH v2 07/11] hw/char/pl011: Extract pl011_read_rxdata() from pl011_read() Philippe Mathieu-Daudé
2023-07-14 7:00 ` Richard Henderson
2023-07-10 17:50 ` [PATCH v2 08/11] hw/char/pl011: Warn when using disabled transmitter Philippe Mathieu-Daudé
2023-07-14 7:01 ` Richard Henderson
2023-07-10 17:51 ` Philippe Mathieu-Daudé [this message]
2023-07-14 7:03 ` [PATCH v2 09/11] hw/char/pl011: Check if receiver is enabled Richard Henderson
2023-07-10 17:51 ` [PATCH v2 10/11] hw/char/pl011: Rename RX FIFO methods Philippe Mathieu-Daudé
2023-07-14 7:06 ` Richard Henderson
2023-07-10 17:51 ` [RFC PATCH v2 11/11] hw/char/pl011: Implement TX FIFO Philippe Mathieu-Daudé
2023-07-14 7:27 ` Richard Henderson
2023-10-13 14:05 ` Philippe Mathieu-Daudé
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