From: Max Chou <max.chou@sifive.com>
To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: dbarboza@ventanamicro.com, alistair23@gmail.com,
"Max Chou" <max.chou@sifive.com>,
"Frank Chang" <frank.chang@sifive.com>,
"Daniel P. Berrangé" <berrange@redhat.com>
Subject: [PATCH v8 14/15] crypto: Add SM4 constant parameter CK
Date: Wed, 12 Jul 2023 00:59:13 +0800 [thread overview]
Message-ID: <20230711165917.2629866-15-max.chou@sifive.com> (raw)
In-Reply-To: <20230711165917.2629866-1-max.chou@sifive.com>
Adds sm4_ck constant for use in sm4 cryptography across different targets.
Signed-off-by: Max Chou <max.chou@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Signed-off-by: Max Chou <max.chou@sifive.com>
---
crypto/sm4.c | 10 ++++++++++
include/crypto/sm4.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/crypto/sm4.c b/crypto/sm4.c
index 9f0cd452c78..2987306cf7a 100644
--- a/crypto/sm4.c
+++ b/crypto/sm4.c
@@ -47,3 +47,13 @@ uint8_t const sm4_sbox[] = {
0x79, 0xee, 0x5f, 0x3e, 0xd7, 0xcb, 0x39, 0x48,
};
+uint32_t const sm4_ck[] = {
+ 0x00070e15, 0x1c232a31, 0x383f464d, 0x545b6269,
+ 0x70777e85, 0x8c939aa1, 0xa8afb6bd, 0xc4cbd2d9,
+ 0xe0e7eef5, 0xfc030a11, 0x181f262d, 0x343b4249,
+ 0x50575e65, 0x6c737a81, 0x888f969d, 0xa4abb2b9,
+ 0xc0c7ced5, 0xdce3eaf1, 0xf8ff060d, 0x141b2229,
+ 0x30373e45, 0x4c535a61, 0x686f767d, 0x848b9299,
+ 0xa0a7aeb5, 0xbcc3cad1, 0xd8dfe6ed, 0xf4fb0209,
+ 0x10171e25, 0x2c333a41, 0x484f565d, 0x646b7279
+};
diff --git a/include/crypto/sm4.h b/include/crypto/sm4.h
index de8245d8a71..382b26d9224 100644
--- a/include/crypto/sm4.h
+++ b/include/crypto/sm4.h
@@ -2,6 +2,7 @@
#define QEMU_SM4_H
extern const uint8_t sm4_sbox[256];
+extern const uint32_t sm4_ck[32];
static inline uint32_t sm4_subword(uint32_t word)
{
--
2.34.1
next prev parent reply other threads:[~2023-07-11 17:04 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-11 16:58 [PATCH v8 00/15] Add RISC-V vector cryptographic instruction set support Max Chou
2023-07-11 16:59 ` [PATCH v8 01/15] target/riscv: Refactor some of the generic vector functionality Max Chou
2023-07-19 0:54 ` Alistair Francis
2023-07-11 16:59 ` [PATCH v8 02/15] target/riscv: Refactor vector-vector translation macro Max Chou
2023-07-11 16:59 ` [PATCH v8 03/15] target/riscv: Remove redundant "cpu_vl == 0" checks Max Chou
2023-08-02 14:22 ` Alistair Francis
2023-07-11 16:59 ` [PATCH v8 04/15] target/riscv: Add Zvbc ISA extension support Max Chou
2023-08-02 14:29 ` Alistair Francis
2023-07-11 16:59 ` [PATCH v8 05/15] target/riscv: Move vector translation checks Max Chou
2023-07-11 16:59 ` [PATCH v8 06/15] target/riscv: Refactor translation of vector-widening instruction Max Chou
2023-07-11 16:59 ` [PATCH v8 07/15] target/riscv: Refactor some of the generic vector functionality Max Chou
2023-07-11 16:59 ` [PATCH v8 08/15] target/riscv: Add Zvbb ISA extension support Max Chou
2023-08-02 14:38 ` Alistair Francis
2023-07-11 16:59 ` [PATCH v8 09/15] target/riscv: Add Zvkned " Max Chou
2023-07-11 16:59 ` [PATCH v8 10/15] target/riscv: Add Zvknh " Max Chou
2023-07-11 16:59 ` [PATCH v8 11/15] target/riscv: Add Zvksh " Max Chou
2023-07-11 16:59 ` [PATCH v8 12/15] target/riscv: Add Zvkg " Max Chou
2023-07-11 16:59 ` [PATCH v8 13/15] crypto: Create sm4_subword Max Chou
2023-07-11 16:59 ` Max Chou [this message]
2023-08-02 14:45 ` [PATCH v8 14/15] crypto: Add SM4 constant parameter CK Alistair Francis
2023-07-11 16:59 ` [PATCH v8 15/15] target/riscv: Add Zvksed ISA extension support Max Chou
2023-08-02 14:54 ` [PATCH v8 00/15] Add RISC-V vector cryptographic instruction set support Alistair Francis
2023-08-03 4:16 ` Max Chou
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