From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH 10/14] target/arm/ptw: Drop S1Translate::out_secure
Date: Fri, 14 Jul 2023 16:46:44 +0100 [thread overview]
Message-ID: <20230714154648.327466-11-peter.maydell@linaro.org> (raw)
In-Reply-To: <20230714154648.327466-1-peter.maydell@linaro.org>
We only use S1Translate::out_secure in two places, where we are
setting up MemTxAttrs for a page table load. We can use
arm_space_is_secure(ptw->out_space) instead, which guarantees
that we're setting the MemTxAttrs secure and space fields
consistently, and allows us to drop the out_secure field in
S1Translate entirely.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/ptw.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 77b8382ceff..2be6bf302b0 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -63,7 +63,6 @@ typedef struct S1Translate {
* Stage 2 is indicated by in_mmu_idx set to ARMMMUIdx_Stage2{,_S}.
*/
bool in_s1_is_el0;
- bool out_secure;
bool out_rw;
bool out_be;
ARMSecuritySpace out_space;
@@ -551,7 +550,6 @@ static bool S1_ptw_translate(CPUARMState *env, S1Translate *ptw,
pte_attrs = s2.cacheattrs.attrs;
ptw->out_host = NULL;
ptw->out_rw = false;
- ptw->out_secure = s2.f.attrs.secure;
ptw->out_space = s2.f.attrs.space;
} else {
#ifdef CONFIG_TCG
@@ -570,7 +568,6 @@ static bool S1_ptw_translate(CPUARMState *env, S1Translate *ptw,
ptw->out_phys = full->phys_addr | (addr & ~TARGET_PAGE_MASK);
ptw->out_rw = full->prot & PAGE_WRITE;
pte_attrs = full->pte_attrs;
- ptw->out_secure = full->attrs.secure;
ptw->out_space = full->attrs.space;
#else
g_assert_not_reached();
@@ -628,8 +625,8 @@ static uint32_t arm_ldl_ptw(CPUARMState *env, S1Translate *ptw,
} else {
/* Page tables are in MMIO. */
MemTxAttrs attrs = {
- .secure = ptw->out_secure,
.space = ptw->out_space,
+ .secure = arm_space_is_secure(ptw->out_space),
};
AddressSpace *as = arm_addressspace(cs, attrs);
MemTxResult result = MEMTX_OK;
@@ -674,8 +671,8 @@ static uint64_t arm_ldq_ptw(CPUARMState *env, S1Translate *ptw,
} else {
/* Page tables are in MMIO. */
MemTxAttrs attrs = {
- .secure = ptw->out_secure,
.space = ptw->out_space,
+ .secure = arm_space_is_secure(ptw->out_space),
};
AddressSpace *as = arm_addressspace(cs, attrs);
MemTxResult result = MEMTX_OK;
--
2.34.1
next prev parent reply other threads:[~2023-07-14 15:48 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-14 15:46 [PATCH 00/14] target/arm/ptw: Cleanups and a few bugfixes Peter Maydell
2023-07-14 15:46 ` [PATCH 01/14] target/arm/ptw: Don't set fi->s1ptw for UnsuppAtomicUpdate fault Peter Maydell
2023-07-23 9:22 ` Richard Henderson
2023-07-14 15:46 ` [PATCH 02/14] target/arm/ptw: Don't report GPC faults on stage 1 ptw as stage2 faults Peter Maydell
2023-07-23 9:34 ` Richard Henderson
2023-07-14 15:46 ` [PATCH 03/14] target/arm/ptw: Set s1ns bit in fault info more consistently Peter Maydell
2023-07-23 9:54 ` Richard Henderson
2023-07-14 15:46 ` [PATCH 04/14] target/arm/ptw: Pass ptw into get_phys_addr_pmsa*() and get_phys_addr_disabled() Peter Maydell
2023-07-23 10:25 ` Richard Henderson
2023-07-14 15:46 ` [PATCH 05/14] target/arm/ptw: Pass ARMSecurityState to regime_translation_disabled() Peter Maydell
2023-07-23 10:25 ` Richard Henderson
2023-07-14 15:46 ` [PATCH 06/14] target/arm/ptw: Pass an ARMSecuritySpace to arm_hcr_el2_eff_secstate() Peter Maydell
2023-07-23 15:24 ` Richard Henderson
2023-07-24 13:42 ` Peter Maydell
2023-07-24 14:38 ` Peter Maydell
2023-07-25 18:36 ` Richard Henderson
2023-07-14 15:46 ` [PATCH 07/14] target/arm/ptw: Only fold in NSTable bit effects in Secure state Peter Maydell
2023-07-23 15:29 ` Richard Henderson
2023-07-14 15:46 ` [PATCH 08/14] target/arm/ptw: Remove last uses of ptw->in_secure Peter Maydell
2023-07-23 15:35 ` Richard Henderson
2023-07-14 15:46 ` [PATCH 09/14] target/arm/ptw: Remove S1Translate::in_secure Peter Maydell
2023-07-23 15:48 ` Richard Henderson
2023-07-14 15:46 ` Peter Maydell [this message]
2023-07-23 15:49 ` [PATCH 10/14] target/arm/ptw: Drop S1Translate::out_secure Richard Henderson
2023-07-14 15:46 ` [PATCH 11/14] target/arm/ptw: Set attributes correctly for MMU disabled data accesses Peter Maydell
2023-07-23 15:50 ` Richard Henderson
2023-07-14 15:46 ` [PATCH 12/14] target/arm/ptw: Check for block descriptors at invalid levels Peter Maydell
2023-07-23 15:58 ` Richard Henderson
2023-07-14 15:46 ` [PATCH 13/14] target/arm/ptw: Report stage 2 fault level for stage 2 faults on stage 1 ptw Peter Maydell
2023-07-23 16:00 ` Richard Henderson
2023-07-14 15:46 ` [PATCH 14/14] target/arm: Adjust PAR_EL1.SH for Device and Normal-NC memory types Peter Maydell
2023-07-23 16:02 ` Richard Henderson
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