* [PATCH v2 0/3] docs: update x86 CPU model ABI matrix docs
@ 2023-07-18 9:26 Daniel P. Berrangé
2023-07-18 9:26 ` [PATCH v2 1/3] scripts: drop comment about autogenerated CPU API file Daniel P. Berrangé
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Daniel P. Berrangé @ 2023-07-18 9:26 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Richard Henderson, John Snow, Cleber Rosa,
Paolo Bonzini, Daniel P. Berrangé
Changed in v2:
- Tweaked commit messages
- Also add GraniteRapids CPU model
Daniel P. Berrangé (3):
scripts: drop comment about autogenerated CPU API file
docs: fix highlighting of CPU ABI header rows
docs: re-generate x86_64 ABI compatibility CSV
docs/system/cpu-models-x86-abi.csv | 20 ++++++++++++++++++--
docs/system/cpu-models-x86.rst.inc | 2 +-
scripts/cpu-x86-uarch-abi.py | 1 -
3 files changed, 19 insertions(+), 4 deletions(-)
--
2.41.0
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 1/3] scripts: drop comment about autogenerated CPU API file
2023-07-18 9:26 [PATCH v2 0/3] docs: update x86 CPU model ABI matrix docs Daniel P. Berrangé
@ 2023-07-18 9:26 ` Daniel P. Berrangé
2023-10-18 14:54 ` Zhao Liu
2023-07-18 9:26 ` [PATCH v2 2/3] docs: fix highlighting of CPU ABI header rows Daniel P. Berrangé
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Daniel P. Berrangé @ 2023-07-18 9:26 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Richard Henderson, John Snow, Cleber Rosa,
Paolo Bonzini, Daniel P. Berrangé
The RST doc include can't be made to skip the comment indicating the CPU
CSV file is auto-generated when importing it. This comment line was
previously manually removed from the generated output that was committed.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
---
scripts/cpu-x86-uarch-abi.py | 1 -
1 file changed, 1 deletion(-)
diff --git a/scripts/cpu-x86-uarch-abi.py b/scripts/cpu-x86-uarch-abi.py
index 82ff07582f..b6285247a1 100644
--- a/scripts/cpu-x86-uarch-abi.py
+++ b/scripts/cpu-x86-uarch-abi.py
@@ -179,7 +179,6 @@
models[name]["delta"][level] = delta
def print_uarch_abi_csv():
- print("# Automatically generated from '%s'" % __file__)
print("Model,baseline,v2,v3,v4")
for name in models.keys():
print(name, end="")
--
2.41.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v2 2/3] docs: fix highlighting of CPU ABI header rows
2023-07-18 9:26 [PATCH v2 0/3] docs: update x86 CPU model ABI matrix docs Daniel P. Berrangé
2023-07-18 9:26 ` [PATCH v2 1/3] scripts: drop comment about autogenerated CPU API file Daniel P. Berrangé
@ 2023-07-18 9:26 ` Daniel P. Berrangé
2023-10-18 15:00 ` Zhao Liu
2023-07-18 9:26 ` [PATCH v2 3/3] docs: re-generate x86_64 ABI compatibility CSV Daniel P. Berrangé
2023-09-14 11:54 ` [PATCH v2 0/3] docs: update x86 CPU model ABI matrix docs Daniel P. Berrangé
3 siblings, 1 reply; 9+ messages in thread
From: Daniel P. Berrangé @ 2023-07-18 9:26 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Richard Henderson, John Snow, Cleber Rosa,
Paolo Bonzini, Daniel P. Berrangé
The 'header-rows' directive indicates how many rows in the generated
table are to be highlighted as headers. We only have one such row in
the CSV file included. This removes the accident bold highlighting
of the 'i486' CPU model.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
---
docs/system/cpu-models-x86.rst.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/system/cpu-models-x86.rst.inc b/docs/system/cpu-models-x86.rst.inc
index 7f6368f999..ba27b5683f 100644
--- a/docs/system/cpu-models-x86.rst.inc
+++ b/docs/system/cpu-models-x86.rst.inc
@@ -58,7 +58,7 @@ depending on the machine type is in use.
.. csv-table:: x86-64 ABI compatibility levels
:file: cpu-models-x86-abi.csv
:widths: 40,15,15,15,15
- :header-rows: 2
+ :header-rows: 1
Preferred CPU models for Intel x86 hosts
--
2.41.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v2 3/3] docs: re-generate x86_64 ABI compatibility CSV
2023-07-18 9:26 [PATCH v2 0/3] docs: update x86 CPU model ABI matrix docs Daniel P. Berrangé
2023-07-18 9:26 ` [PATCH v2 1/3] scripts: drop comment about autogenerated CPU API file Daniel P. Berrangé
2023-07-18 9:26 ` [PATCH v2 2/3] docs: fix highlighting of CPU ABI header rows Daniel P. Berrangé
@ 2023-07-18 9:26 ` Daniel P. Berrangé
2023-10-18 14:50 ` Zhao Liu
2023-09-14 11:54 ` [PATCH v2 0/3] docs: update x86 CPU model ABI matrix docs Daniel P. Berrangé
3 siblings, 1 reply; 9+ messages in thread
From: Daniel P. Berrangé @ 2023-07-18 9:26 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Richard Henderson, John Snow, Cleber Rosa,
Paolo Bonzini, Daniel P. Berrangé
This picks up the new EPYC-Genoa, SapphireRapids & GraniteRapids CPUs,
removes the now deleted Icelake-Client CPU, and adds the newer versions
of many existing CPUs.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
---
docs/system/cpu-models-x86-abi.csv | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/docs/system/cpu-models-x86-abi.csv b/docs/system/cpu-models-x86-abi.csv
index f3f3b60be1..38b9bae310 100644
--- a/docs/system/cpu-models-x86-abi.csv
+++ b/docs/system/cpu-models-x86-abi.csv
@@ -8,27 +8,37 @@ Cascadelake-Server-v1,✅,✅,✅,✅
Cascadelake-Server-v2,✅,✅,✅,✅
Cascadelake-Server-v3,✅,✅,✅,✅
Cascadelake-Server-v4,✅,✅,✅,✅
+Cascadelake-Server-v5,✅,✅,✅,✅
Conroe-v1,✅,,,
Cooperlake-v1,✅,✅,✅,✅
+Cooperlake-v2,✅,✅,✅,✅
Denverton-v1,✅,✅,,
Denverton-v2,✅,✅,,
+Denverton-v3,✅,✅,,
Dhyana-v1,✅,✅,✅,
+Dhyana-v2,✅,✅,✅,
+EPYC-Genoa-v1,✅,✅,✅,✅
EPYC-Milan-v1,✅,✅,✅,
+EPYC-Milan-v2,✅,✅,✅,
EPYC-Rome-v1,✅,✅,✅,
EPYC-Rome-v2,✅,✅,✅,
+EPYC-Rome-v3,✅,✅,✅,
+EPYC-Rome-v4,✅,✅,✅,
EPYC-v1,✅,✅,✅,
EPYC-v2,✅,✅,✅,
EPYC-v3,✅,✅,✅,
+EPYC-v4,✅,✅,✅,
+GraniteRapids-v1,✅,✅,✅,✅
Haswell-v1,✅,✅,✅,
Haswell-v2,✅,✅,✅,
Haswell-v3,✅,✅,✅,
Haswell-v4,✅,✅,✅,
-Icelake-Client-v1,✅,✅,✅,
-Icelake-Client-v2,✅,✅,✅,
Icelake-Server-v1,✅,✅,✅,✅
Icelake-Server-v2,✅,✅,✅,✅
Icelake-Server-v3,✅,✅,✅,✅
Icelake-Server-v4,✅,✅,✅,✅
+Icelake-Server-v5,✅,✅,✅,✅
+Icelake-Server-v6,✅,✅,✅,✅
IvyBridge-v1,✅,✅,,
IvyBridge-v2,✅,✅,,
KnightsMill-v1,✅,✅,✅,
@@ -42,15 +52,21 @@ Opteron_G5-v1,✅,✅,,
Penryn-v1,✅,,,
SandyBridge-v1,✅,✅,,
SandyBridge-v2,✅,✅,,
+SapphireRapids-v1,✅,✅,✅,✅
+SapphireRapids-v2,✅,✅,✅,✅
Skylake-Client-v1,✅,✅,✅,
Skylake-Client-v2,✅,✅,✅,
Skylake-Client-v3,✅,✅,✅,
+Skylake-Client-v4,✅,✅,✅,
Skylake-Server-v1,✅,✅,✅,✅
Skylake-Server-v2,✅,✅,✅,✅
Skylake-Server-v3,✅,✅,✅,✅
Skylake-Server-v4,✅,✅,✅,✅
+Skylake-Server-v5,✅,✅,✅,✅
Snowridge-v1,✅,✅,,
Snowridge-v2,✅,✅,,
+Snowridge-v3,✅,✅,,
+Snowridge-v4,✅,✅,,
Westmere-v1,✅,✅,,
Westmere-v2,✅,✅,,
athlon-v1,,,,
--
2.41.0
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v2 0/3] docs: update x86 CPU model ABI matrix docs
2023-07-18 9:26 [PATCH v2 0/3] docs: update x86 CPU model ABI matrix docs Daniel P. Berrangé
` (2 preceding siblings ...)
2023-07-18 9:26 ` [PATCH v2 3/3] docs: re-generate x86_64 ABI compatibility CSV Daniel P. Berrangé
@ 2023-09-14 11:54 ` Daniel P. Berrangé
2023-11-07 14:41 ` Daniel P. Berrangé
3 siblings, 1 reply; 9+ messages in thread
From: Daniel P. Berrangé @ 2023-09-14 11:54 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Richard Henderson, John Snow, Cleber Rosa,
Paolo Bonzini
Ping for review please. This series still applies to git master.
On Tue, Jul 18, 2023 at 10:26:28AM +0100, Daniel P. Berrangé wrote:
> Changed in v2:
>
> - Tweaked commit messages
> - Also add GraniteRapids CPU model
>
> Daniel P. Berrangé (3):
> scripts: drop comment about autogenerated CPU API file
> docs: fix highlighting of CPU ABI header rows
> docs: re-generate x86_64 ABI compatibility CSV
>
> docs/system/cpu-models-x86-abi.csv | 20 ++++++++++++++++++--
> docs/system/cpu-models-x86.rst.inc | 2 +-
> scripts/cpu-x86-uarch-abi.py | 1 -
> 3 files changed, 19 insertions(+), 4 deletions(-)
>
> --
> 2.41.0
>
With regards,
Daniel
--
|: https://berrange.com -o- https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org -o- https://fstop138.berrange.com :|
|: https://entangle-photo.org -o- https://www.instagram.com/dberrange :|
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 3/3] docs: re-generate x86_64 ABI compatibility CSV
2023-07-18 9:26 ` [PATCH v2 3/3] docs: re-generate x86_64 ABI compatibility CSV Daniel P. Berrangé
@ 2023-10-18 14:50 ` Zhao Liu
0 siblings, 0 replies; 9+ messages in thread
From: Zhao Liu @ 2023-10-18 14:50 UTC (permalink / raw)
To: Daniel P. Berrangé
Cc: qemu-devel, Eduardo Habkost, Richard Henderson, John Snow,
Cleber Rosa, Paolo Bonzini
On Tue, Jul 18, 2023 at 10:26:31AM +0100, Daniel P. Berrangé wrote:
> Date: Tue, 18 Jul 2023 10:26:31 +0100
> From: "Daniel P. Berrangé" <berrange@redhat.com>
> Subject: [PATCH v2 3/3] docs: re-generate x86_64 ABI compatibility CSV
>
> This picks up the new EPYC-Genoa, SapphireRapids & GraniteRapids CPUs,
> removes the now deleted Icelake-Client CPU, and adds the newer versions
> of many existing CPUs.
>
> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
> ---
> docs/system/cpu-models-x86-abi.csv | 20 ++++++++++++++++++--
> 1 file changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/docs/system/cpu-models-x86-abi.csv b/docs/system/cpu-models-x86-abi.csv
> index f3f3b60be1..38b9bae310 100644
> --- a/docs/system/cpu-models-x86-abi.csv
> +++ b/docs/system/cpu-models-x86-abi.csv
> @@ -8,27 +8,37 @@ Cascadelake-Server-v1,✅,✅,✅,✅
> Cascadelake-Server-v2,✅,✅,✅,✅
> Cascadelake-Server-v3,✅,✅,✅,✅
> Cascadelake-Server-v4,✅,✅,✅,✅
> +Cascadelake-Server-v5,✅,✅,✅,✅
> Conroe-v1,✅,,,
> Cooperlake-v1,✅,✅,✅,✅
> +Cooperlake-v2,✅,✅,✅,✅
> Denverton-v1,✅,✅,,
> Denverton-v2,✅,✅,,
> +Denverton-v3,✅,✅,,
> Dhyana-v1,✅,✅,✅,
> +Dhyana-v2,✅,✅,✅,
> +EPYC-Genoa-v1,✅,✅,✅,✅
> EPYC-Milan-v1,✅,✅,✅,
> +EPYC-Milan-v2,✅,✅,✅,
> EPYC-Rome-v1,✅,✅,✅,
> EPYC-Rome-v2,✅,✅,✅,
> +EPYC-Rome-v3,✅,✅,✅,
> +EPYC-Rome-v4,✅,✅,✅,
> EPYC-v1,✅,✅,✅,
> EPYC-v2,✅,✅,✅,
> EPYC-v3,✅,✅,✅,
> +EPYC-v4,✅,✅,✅,
> +GraniteRapids-v1,✅,✅,✅,✅
> Haswell-v1,✅,✅,✅,
> Haswell-v2,✅,✅,✅,
> Haswell-v3,✅,✅,✅,
> Haswell-v4,✅,✅,✅,
> -Icelake-Client-v1,✅,✅,✅,
> -Icelake-Client-v2,✅,✅,✅,
> Icelake-Server-v1,✅,✅,✅,✅
> Icelake-Server-v2,✅,✅,✅,✅
> Icelake-Server-v3,✅,✅,✅,✅
> Icelake-Server-v4,✅,✅,✅,✅
> +Icelake-Server-v5,✅,✅,✅,✅
> +Icelake-Server-v6,✅,✅,✅,✅
> IvyBridge-v1,✅,✅,,
> IvyBridge-v2,✅,✅,,
> KnightsMill-v1,✅,✅,✅,
> @@ -42,15 +52,21 @@ Opteron_G5-v1,✅,✅,,
> Penryn-v1,✅,,,
> SandyBridge-v1,✅,✅,,
> SandyBridge-v2,✅,✅,,
> +SapphireRapids-v1,✅,✅,✅,✅
> +SapphireRapids-v2,✅,✅,✅,✅
> Skylake-Client-v1,✅,✅,✅,
> Skylake-Client-v2,✅,✅,✅,
> Skylake-Client-v3,✅,✅,✅,
> +Skylake-Client-v4,✅,✅,✅,
> Skylake-Server-v1,✅,✅,✅,✅
> Skylake-Server-v2,✅,✅,✅,✅
> Skylake-Server-v3,✅,✅,✅,✅
> Skylake-Server-v4,✅,✅,✅,✅
> +Skylake-Server-v5,✅,✅,✅,✅
> Snowridge-v1,✅,✅,,
> Snowridge-v2,✅,✅,,
> +Snowridge-v3,✅,✅,,
> +Snowridge-v4,✅,✅,,
> Westmere-v1,✅,✅,,
> Westmere-v2,✅,✅,,
> athlon-v1,,,,
> --
> 2.41.0
>
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 1/3] scripts: drop comment about autogenerated CPU API file
2023-07-18 9:26 ` [PATCH v2 1/3] scripts: drop comment about autogenerated CPU API file Daniel P. Berrangé
@ 2023-10-18 14:54 ` Zhao Liu
0 siblings, 0 replies; 9+ messages in thread
From: Zhao Liu @ 2023-10-18 14:54 UTC (permalink / raw)
To: Daniel P. Berrangé
Cc: qemu-devel, Eduardo Habkost, Richard Henderson, John Snow,
Cleber Rosa, Paolo Bonzini
On Tue, Jul 18, 2023 at 10:26:29AM +0100, Daniel P. Berrangé wrote:
> Date: Tue, 18 Jul 2023 10:26:29 +0100
> From: "Daniel P. Berrangé" <berrange@redhat.com>
> Subject: [PATCH v2 1/3] scripts: drop comment about autogenerated CPU API
> file
>
> The RST doc include can't be made to skip the comment indicating the CPU
> CSV file is auto-generated when importing it. This comment line was
> previously manually removed from the generated output that was committed.
>
> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
And tested on master with a fix [1].
If this test case also allows tested-by, then,
Tested-by: Zhao Liu <zhao1.liu@intel.com>
[1]: https://lists.nongnu.org/archive/html/qemu-devel/2023-10/msg05687.html
> ---
> scripts/cpu-x86-uarch-abi.py | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/scripts/cpu-x86-uarch-abi.py b/scripts/cpu-x86-uarch-abi.py
> index 82ff07582f..b6285247a1 100644
> --- a/scripts/cpu-x86-uarch-abi.py
> +++ b/scripts/cpu-x86-uarch-abi.py
> @@ -179,7 +179,6 @@
> models[name]["delta"][level] = delta
>
> def print_uarch_abi_csv():
> - print("# Automatically generated from '%s'" % __file__)
> print("Model,baseline,v2,v3,v4")
> for name in models.keys():
> print(name, end="")
> --
> 2.41.0
>
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 2/3] docs: fix highlighting of CPU ABI header rows
2023-07-18 9:26 ` [PATCH v2 2/3] docs: fix highlighting of CPU ABI header rows Daniel P. Berrangé
@ 2023-10-18 15:00 ` Zhao Liu
0 siblings, 0 replies; 9+ messages in thread
From: Zhao Liu @ 2023-10-18 15:00 UTC (permalink / raw)
To: Daniel P. Berrangé
Cc: qemu-devel, Eduardo Habkost, Richard Henderson, John Snow,
Cleber Rosa, Paolo Bonzini
On Tue, Jul 18, 2023 at 10:26:30AM +0100, Daniel P. Berrangé wrote:
> Date: Tue, 18 Jul 2023 10:26:30 +0100
> From: "Daniel P. Berrangé" <berrange@redhat.com>
> Subject: [PATCH v2 2/3] docs: fix highlighting of CPU ABI header rows
>
> The 'header-rows' directive indicates how many rows in the generated
> table are to be highlighted as headers. We only have one such row in
> the CSV file included. This removes the accident bold highlighting
> of the 'i486' CPU model.
>
> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
> ---
> docs/system/cpu-models-x86.rst.inc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/docs/system/cpu-models-x86.rst.inc b/docs/system/cpu-models-x86.rst.inc
> index 7f6368f999..ba27b5683f 100644
> --- a/docs/system/cpu-models-x86.rst.inc
> +++ b/docs/system/cpu-models-x86.rst.inc
> @@ -58,7 +58,7 @@ depending on the machine type is in use.
> .. csv-table:: x86-64 ABI compatibility levels
> :file: cpu-models-x86-abi.csv
> :widths: 40,15,15,15,15
> - :header-rows: 2
> + :header-rows: 1
>
>
> Preferred CPU models for Intel x86 hosts
> --
> 2.41.0
>
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 0/3] docs: update x86 CPU model ABI matrix docs
2023-09-14 11:54 ` [PATCH v2 0/3] docs: update x86 CPU model ABI matrix docs Daniel P. Berrangé
@ 2023-11-07 14:41 ` Daniel P. Berrangé
0 siblings, 0 replies; 9+ messages in thread
From: Daniel P. Berrangé @ 2023-11-07 14:41 UTC (permalink / raw)
To: qemu-devel, Eduardo Habkost, Richard Henderson, John Snow,
Cleber Rosa, Paolo Bonzini
Ping, for anyone who can review this.
On Thu, Sep 14, 2023 at 12:54:08PM +0100, Daniel P. Berrangé wrote:
> Ping for review please. This series still applies to git master.
>
> On Tue, Jul 18, 2023 at 10:26:28AM +0100, Daniel P. Berrangé wrote:
> > Changed in v2:
> >
> > - Tweaked commit messages
> > - Also add GraniteRapids CPU model
> >
> > Daniel P. Berrangé (3):
> > scripts: drop comment about autogenerated CPU API file
> > docs: fix highlighting of CPU ABI header rows
> > docs: re-generate x86_64 ABI compatibility CSV
> >
> > docs/system/cpu-models-x86-abi.csv | 20 ++++++++++++++++++--
> > docs/system/cpu-models-x86.rst.inc | 2 +-
> > scripts/cpu-x86-uarch-abi.py | 1 -
> > 3 files changed, 19 insertions(+), 4 deletions(-)
> >
> > --
> > 2.41.0
> >
>
> With regards,
> Daniel
> --
> |: https://berrange.com -o- https://www.flickr.com/photos/dberrange :|
> |: https://libvirt.org -o- https://fstop138.berrange.com :|
> |: https://entangle-photo.org -o- https://www.instagram.com/dberrange :|
>
>
With regards,
Daniel
--
|: https://berrange.com -o- https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org -o- https://fstop138.berrange.com :|
|: https://entangle-photo.org -o- https://www.instagram.com/dberrange :|
^ permalink raw reply [flat|nested] 9+ messages in thread
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2023-07-18 9:26 [PATCH v2 0/3] docs: update x86 CPU model ABI matrix docs Daniel P. Berrangé
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2023-07-18 9:26 ` [PATCH v2 3/3] docs: re-generate x86_64 ABI compatibility CSV Daniel P. Berrangé
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2023-09-14 11:54 ` [PATCH v2 0/3] docs: update x86 CPU model ABI matrix docs Daniel P. Berrangé
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