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[31.30.173.16]) by smtp.gmail.com with ESMTPSA id u9-20020a05600c210900b003fbcdba1a52sm6476865wml.3.2023.07.21.10.41.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jul 2023 10:41:18 -0700 (PDT) Date: Fri, 21 Jul 2023 19:41:18 +0200 From: Andrew Jones To: Yong-Xuan Wang Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, rkanwal@rivosinc.com, anup@brainfault.org, dbarboza@ventanamicro.com, atishp@atishpatra.org, vincent.chen@sifive.com, greentime.hu@sifive.com, frank.chang@sifive.com, jim.shu@sifive.com, Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Liu Zhiwei , Paolo Bonzini , kvm@vger.kernel.org Subject: Re: [PATCH v6 3/5] target/riscv: Create an KVM AIA irqchip Message-ID: <20230721-72cb5810011b0a676b359d36@orel> References: <20230714084429.22349-1-yongxuan.wang@sifive.com> <20230714084429.22349-4-yongxuan.wang@sifive.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230714084429.22349-4-yongxuan.wang@sifive.com> Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=ajones@ventanamicro.com; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, Jul 14, 2023 at 08:44:25AM +0000, Yong-Xuan Wang wrote: > We create a vAIA chip by using the KVM_DEV_TYPE_RISCV_AIA and then set up > the chip with the KVM_DEV_RISCV_AIA_GRP_* APIs. > > Signed-off-by: Yong-Xuan Wang > Reviewed-by: Jim Shu > Reviewed-by: Daniel Henrique Barboza > Reviewed-by: Andrew Jones > --- > target/riscv/kvm.c | 160 +++++++++++++++++++++++++++++++++++++++ > target/riscv/kvm_riscv.h | 6 ++ > 2 files changed, 166 insertions(+) > > diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c > index 005e054604..9bc92cedff 100644 > --- a/target/riscv/kvm.c > +++ b/target/riscv/kvm.c > @@ -36,6 +36,7 @@ > #include "exec/address-spaces.h" > #include "hw/boards.h" > #include "hw/irq.h" > +#include "hw/intc/riscv_imsic.h" > #include "qemu/log.h" > #include "hw/loader.h" > #include "kvm_riscv.h" > @@ -43,6 +44,7 @@ > #include "chardev/char-fe.h" > #include "migration/migration.h" > #include "sysemu/runstate.h" > +#include "hw/riscv/numa.h" > > static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uint64_t type, > uint64_t idx) > @@ -1026,3 +1028,161 @@ bool kvm_arch_cpu_check_are_resettable(void) > void kvm_arch_accel_class_init(ObjectClass *oc) > { > } > + > +char *kvm_aia_mode_str(uint64_t aia_mode) > +{ > + const char *val; I just tried compiling this series and see it doesn't with -Werror. kvm_aia_mode_str() should return 'const char *' and this 'val' variable is unused. Thanks, drew