From: Igor Mammedov <imammedo@redhat.com>
To: Sunil V L <sunilvl@ventanamicro.com>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org,
qemu-riscv@nongnu.org, "Michael S . Tsirkin" <mst@redhat.com>,
Ani Sinha <anisinha@redhat.com>,
Peter Maydell <peter.maydell@linaro.org>,
Shannon Zhao <shannon.zhaosl@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
Bin Meng <bin.meng@windriver.com>,
Weiwei Li <liweiwei@iscas.ac.cn>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
Andrew Jones <ajones@ventanamicro.com>,
Anup Patel <apatel@ventanamicro.com>
Subject: Re: [PATCH 04/10] hw/riscv: virt: Add PCIe HIGHMEM in memmap
Date: Mon, 24 Jul 2023 17:32:54 +0200 [thread overview]
Message-ID: <20230724173254.3423a204@imammedo.users.ipa.redhat.com> (raw)
In-Reply-To: <20230712163943.98994-5-sunilvl@ventanamicro.com>
On Wed, 12 Jul 2023 22:09:37 +0530
Sunil V L <sunilvl@ventanamicro.com> wrote:
> PCIe High MMIO base is actually dynamic and fixed at
> run time based on the RAM configured. Currently, this is
> not part of the memmap and kept in separate static variable
> in virt.c. However, ACPI code also needs this information
> to populate DSDT. So, once the base is discovered, merge
> this into the final memmap which can be used to create
> ACPI tables later.
can ACPI code fetch virt_high_pcie_memmap at runtime from
host bridge (like we do in pc/q35)?
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
> hw/riscv/virt.c | 31 ++++++++++++++++++++++++++++++-
> include/hw/riscv/virt.h | 9 +++++++--
> 2 files changed, 37 insertions(+), 3 deletions(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index f6067db8ec..7aee06f021 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -84,6 +84,22 @@ static const MemMapEntry virt_memmap[] = {
>
> static MemMapEntry virt_high_pcie_memmap;
>
> +/*
> + * virt_memmap doesn't include floating High Mem IO address entry. To enable
> + * code organization in multiple files (ex: ACPI), it is better to have single
> + * memmap which has complete information.
> + *
> + * VIRT_HIGH_PCIE_MMIO is always greater than the last memmap entry and hence
> + * full_virt_memmap is capable of holding both virt_memmap and
> + * VIRT_HIGH_PCIE_MMIO entry.
> + *
> + * The values for these floating entries will be updated when top of RAM is
> + * discovered.
> + */
> +static MemMapEntry full_virt_memmap[] = {
> + [VIRT_HIGH_PCIE_MMIO] = { 0x0, 0 },
> +};
> +
> #define VIRT_FLASH_SECTOR_SIZE (256 * KiB)
>
> static PFlashCFI01 *virt_flash_create1(RISCVVirtState *s,
> @@ -1444,7 +1460,20 @@ static void virt_machine_init(MachineState *machine)
> ROUND_UP(virt_high_pcie_memmap.base, virt_high_pcie_memmap.size);
> }
>
> - s->memmap = virt_memmap;
> + /*
> + * Initialize the floating values in full memory map
> + */
> + full_virt_memmap[VIRT_HIGH_PCIE_MMIO].base = virt_high_pcie_memmap.base;
> + full_virt_memmap[VIRT_HIGH_PCIE_MMIO].size = virt_high_pcie_memmap.size;
> +
> + s->memmap = full_virt_memmap;
> + /*
> + * Copy the base virt_memmap entries to full memmap
> + */
> + for (i = 0; i < ARRAY_SIZE(virt_memmap); i++) {
> + s->memmap[i] = virt_memmap[i];
> + }
> +
>
> /* register system main memory (actual RAM) */
> memory_region_add_subregion(system_memory, memmap[VIRT_DRAM].base,
> diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
> index 00c22492a7..1d7ddf5df0 100644
> --- a/include/hw/riscv/virt.h
> +++ b/include/hw/riscv/virt.h
> @@ -60,7 +60,7 @@ struct RISCVVirtState {
> char *oem_id;
> char *oem_table_id;
> OnOffAuto acpi;
> - const MemMapEntry *memmap;
> + MemMapEntry *memmap;
> PCIBus *bus;
> };
>
> @@ -84,7 +84,12 @@ enum {
> VIRT_PCIE_MMIO,
> VIRT_PCIE_PIO,
> VIRT_PLATFORM_BUS,
> - VIRT_PCIE_ECAM
> + VIRT_PCIE_ECAM,
> + VIRT_LAST_MEMMAP /* Keep this entry always last */
> +};
> +
> +enum {
> + VIRT_HIGH_PCIE_MMIO = VIRT_LAST_MEMMAP,
> };
>
> enum {
next prev parent reply other threads:[~2023-07-24 15:34 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-12 16:39 [PATCH 00/10] RISC-V: ACPI: Enable AIA and update RHC Sunil V L
2023-07-12 16:39 ` [PATCH 01/10] hw/arm/virt-acpi-build.c: Move fw_cfg and virtio to common location Sunil V L
2023-07-12 19:06 ` Daniel Henrique Barboza
2023-07-23 23:40 ` Alistair Francis
2023-07-24 15:18 ` Igor Mammedov
2023-07-25 16:50 ` Sunil V L
2023-07-26 8:25 ` Igor Mammedov
2023-08-16 18:51 ` Daniel Henrique Barboza
2023-08-17 3:30 ` Sunil V L
2023-07-12 16:39 ` [PATCH 02/10] hw/riscv: virt: Add PCI bus reference in RISCVVirtState Sunil V L
2023-07-12 20:18 ` Daniel Henrique Barboza
2023-07-23 23:45 ` Alistair Francis
2023-07-12 16:39 ` [PATCH 03/10] hw/riscv: virt: Make few IMSIC macros and functions public Sunil V L
2023-07-12 20:21 ` Daniel Henrique Barboza
2023-07-24 1:53 ` Alistair Francis
2023-07-12 16:39 ` [PATCH 04/10] hw/riscv: virt: Add PCIe HIGHMEM in memmap Sunil V L
2023-07-18 20:05 ` Daniel Henrique Barboza
2023-07-19 3:37 ` Sunil V L
2023-07-24 15:32 ` Igor Mammedov [this message]
2023-07-27 10:59 ` Sunil V L
2023-07-27 12:04 ` Igor Mammedov
2023-07-27 12:32 ` Sunil V L
2023-07-12 16:39 ` [PATCH 05/10] hw/riscv/virt-acpi-build.c: Add AIA support in RINTC Sunil V L
2023-07-18 20:06 ` Daniel Henrique Barboza
2023-07-12 16:39 ` [PATCH 06/10] hw/riscv/virt-acpi-build.c: Add IMSIC in the MADT Sunil V L
2023-07-18 20:06 ` Daniel Henrique Barboza
2023-07-12 16:39 ` [PATCH 07/10] hw/riscv/virt-acpi-build.c: Add APLIC " Sunil V L
2023-07-18 20:10 ` Daniel Henrique Barboza
2023-07-12 16:39 ` [PATCH 08/10] hw/riscv/virt-acpi-build.c: Add CMO information in RHCT Sunil V L
2023-07-18 20:10 ` Daniel Henrique Barboza
2023-07-12 16:39 ` [PATCH 09/10] hw/riscv/virt-acpi-build.c: Add MMU node " Sunil V L
2023-07-18 20:12 ` Daniel Henrique Barboza
2023-07-12 16:39 ` [PATCH 10/10] hw/riscv/virt-acpi-build.c: Add IO controllers and devices Sunil V L
2023-07-18 20:13 ` Daniel Henrique Barboza
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