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Thu, 27 Jul 2023 10:24:58 -0700 (PDT) Received: from redhat.com ([38.15.60.12]) by smtp.gmail.com with ESMTPSA id cw11-20020a05663849cb00b0042adc25ab12sm556261jab.44.2023.07.27.10.24.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jul 2023 10:24:57 -0700 (PDT) Date: Thu, 27 Jul 2023 11:24:57 -0600 From: Alex Williamson To: Jing Liu Cc: qemu-devel@nongnu.org, clg@redhat.com, pbonzini@redhat.com, kevin.tian@intel.com, reinette.chatre@intel.com Subject: Re: [PATCH RFC v1 1/3] vfio/pci: detect the support of dynamic MSI-X allocation Message-ID: <20230727112457.1422f285.alex.williamson@redhat.com> In-Reply-To: <20230727072410.135743-2-jing2.liu@intel.com> References: <20230727072410.135743-1-jing2.liu@intel.com> <20230727072410.135743-2-jing2.liu@intel.com> Organization: Red Hat MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=alex.williamson@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Thu, 27 Jul 2023 03:24:08 -0400 Jing Liu wrote: > From: Reinette Chatre > > Kernel provides the guidance of dynamic MSI-X allocation support of > passthrough device, by clearing the VFIO_IRQ_INFO_NORESIZE flag to > guide user space. > > Fetch and store the flags from host for later use to determine if > specific flags are set. > > Signed-off-by: Reinette Chatre > Signed-off-by: Jing Liu > --- > hw/vfio/pci.c | 12 ++++++++++++ > hw/vfio/pci.h | 1 + > hw/vfio/trace-events | 2 ++ > 3 files changed, 15 insertions(+) > > diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c > index a205c6b1130f..0c4ac0873d40 100644 > --- a/hw/vfio/pci.c > +++ b/hw/vfio/pci.c > @@ -1572,6 +1572,7 @@ static void vfio_msix_early_setup(VFIOPCIDevice *vdev, Error **errp) > > static int vfio_msix_setup(VFIOPCIDevice *vdev, int pos, Error **errp) > { > + struct vfio_irq_info irq_info = { .argsz = sizeof(irq_info) }; > int ret; > Error *err = NULL; > > @@ -1624,6 +1625,17 @@ static int vfio_msix_setup(VFIOPCIDevice *vdev, int pos, Error **errp) > memory_region_set_enabled(&vdev->pdev.msix_table_mmio, false); > } > > + irq_info.index = VFIO_PCI_MSIX_IRQ_INDEX; > + ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_GET_IRQ_INFO, &irq_info); > + if (ret) { > + /* This can fail for an old kernel or legacy PCI dev */ > + trace_vfio_msix_setup_get_irq_info_failure(strerror(errno)); We only call vfio_msix_setup() if the device has an MSI-X capability, so the "legacy PCI" portion of this comment seems unjustified. Otherwise the GET_IRQ_INFO ioctl has always existed, so I'd also question the "old kernel" part of this comment. We don't currently sanity test the device exposed MSI-X info versus that reported by GET_IRQ_INFO, but it seems valid to do so. I'd expect this to happen in vfio_msix_early_setup() though, especially since that's where the remainder of VFIOMSIXInfo is setup. > + } else { > + vdev->msix->irq_info_flags = irq_info.flags; > + } > + trace_vfio_msix_setup_irq_info_flags(vdev->vbasedev.name, > + vdev->msix->irq_info_flags); > + > return 0; > } > > diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h > index a2771b9ff3cc..ad34ec56d0ae 100644 > --- a/hw/vfio/pci.h > +++ b/hw/vfio/pci.h > @@ -113,6 +113,7 @@ typedef struct VFIOMSIXInfo { > uint32_t table_offset; > uint32_t pba_offset; > unsigned long *pending; > + uint32_t irq_info_flags; Why not simply pull out a "noresize" bool? Thanks, Alex > } VFIOMSIXInfo; > > #define TYPE_VFIO_PCI "vfio-pci" > diff --git a/hw/vfio/trace-events b/hw/vfio/trace-events > index ee7509e68e4f..7d4a398f044d 100644 > --- a/hw/vfio/trace-events > +++ b/hw/vfio/trace-events > @@ -28,6 +28,8 @@ vfio_pci_read_config(const char *name, int addr, int len, int val) " (%s, @0x%x, > vfio_pci_write_config(const char *name, int addr, int val, int len) " (%s, @0x%x, 0x%x, len=0x%x)" > vfio_msi_setup(const char *name, int pos) "%s PCI MSI CAP @0x%x" > vfio_msix_early_setup(const char *name, int pos, int table_bar, int offset, int entries) "%s PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d" > +vfio_msix_setup_get_irq_info_failure(const char *errstr) "VFIO_DEVICE_GET_IRQ_INFO failure: %s" > +vfio_msix_setup_irq_info_flags(const char *name, uint32_t flags) " (%s) MSI-X irq info flags 0x%x" > vfio_check_pcie_flr(const char *name) "%s Supports FLR via PCIe cap" > vfio_check_pm_reset(const char *name) "%s Supports PM reset" > vfio_check_af_flr(const char *name) "%s Supports FLR via AF cap"