From: Thomas Huth <thuth@redhat.com>
To: "Michael S. Tsirkin" <mst@redhat.com>, Peter Xu <peterx@redhat.com>
Cc: "Jason Wang" <jasowang@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
qemu-devel@nongnu.org,
"Daniel P . Berrangé" <berrange@redhat.com>,
qemu-stable@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>
Subject: [PATCH 6/6] include/hw/i386/x86-iommu: Fix struct X86IOMMU_MSIMessage for big endian hosts
Date: Wed, 2 Aug 2023 15:57:23 +0200 [thread overview]
Message-ID: <20230802135723.178083-7-thuth@redhat.com> (raw)
In-Reply-To: <20230802135723.178083-1-thuth@redhat.com>
The first bitfield here is supposed to be used as a 64-bit equivalent
to the "uint64_t msi_addr" in the union. To make this work correctly
on big endian hosts, too, the __addr_hi field has to be part of the
bitfield, and the the bitfield members must be declared with "uint64_t"
instead of "uint32_t" - otherwise the values are placed in the wrong
bytes on big endian hosts.
Same applies to the 32-bit "msi_data" field: __resved1 must be part
of the bitfield, and the members must be declared with "uint32_t"
instead of "uint16_t".
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
include/hw/i386/x86-iommu.h | 50 +++++++++++++++++++------------------
1 file changed, 26 insertions(+), 24 deletions(-)
diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h
index 8d8d53b18b..bfd21649d0 100644
--- a/include/hw/i386/x86-iommu.h
+++ b/include/hw/i386/x86-iommu.h
@@ -87,40 +87,42 @@ struct X86IOMMU_MSIMessage {
union {
struct {
#if HOST_BIG_ENDIAN
- uint32_t __addr_head:12; /* 0xfee */
- uint32_t dest:8;
- uint32_t __reserved:8;
- uint32_t redir_hint:1;
- uint32_t dest_mode:1;
- uint32_t __not_used:2;
+ uint64_t __addr_hi:32;
+ uint64_t __addr_head:12; /* 0xfee */
+ uint64_t dest:8;
+ uint64_t __reserved:8;
+ uint64_t redir_hint:1;
+ uint64_t dest_mode:1;
+ uint64_t __not_used:2;
#else
- uint32_t __not_used:2;
- uint32_t dest_mode:1;
- uint32_t redir_hint:1;
- uint32_t __reserved:8;
- uint32_t dest:8;
- uint32_t __addr_head:12; /* 0xfee */
+ uint64_t __not_used:2;
+ uint64_t dest_mode:1;
+ uint64_t redir_hint:1;
+ uint64_t __reserved:8;
+ uint64_t dest:8;
+ uint64_t __addr_head:12; /* 0xfee */
+ uint64_t __addr_hi:32;
#endif
- uint32_t __addr_hi;
} QEMU_PACKED;
uint64_t msi_addr;
};
union {
struct {
#if HOST_BIG_ENDIAN
- uint16_t trigger_mode:1;
- uint16_t level:1;
- uint16_t __resved:3;
- uint16_t delivery_mode:3;
- uint16_t vector:8;
+ uint32_t __resved1:16;
+ uint32_t trigger_mode:1;
+ uint32_t level:1;
+ uint32_t __resved:3;
+ uint32_t delivery_mode:3;
+ uint32_t vector:8;
#else
- uint16_t vector:8;
- uint16_t delivery_mode:3;
- uint16_t __resved:3;
- uint16_t level:1;
- uint16_t trigger_mode:1;
+ uint32_t vector:8;
+ uint32_t delivery_mode:3;
+ uint32_t __resved:3;
+ uint32_t level:1;
+ uint32_t trigger_mode:1;
+ uint32_t __resved1:16;
#endif
- uint16_t __resved1;
} QEMU_PACKED;
uint32_t msi_data;
};
--
2.39.3
next prev parent reply other threads:[~2023-08-02 13:59 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-02 13:57 [PATCH for-8.1 0/6] Fix endianness issues in the intel-iommu device Thomas Huth
2023-08-02 13:57 ` [PATCH 1/6] hw/i386/intel_iommu: Fix trivial endianness problems Thomas Huth
2023-08-02 21:13 ` Philippe Mathieu-Daudé
2023-08-02 13:57 ` [PATCH 2/6] hw/i386/intel_iommu: Fix endianness problems related to VTD_IR_TableEntry Thomas Huth
2023-08-02 13:57 ` [PATCH 3/6] hw/i386/intel_iommu: Fix struct VTDInvDescIEC on big endian hosts Thomas Huth
2023-08-02 21:16 ` Philippe Mathieu-Daudé
2023-08-02 13:57 ` [PATCH 4/6] hw/i386/intel_iommu: Fix index calculation in vtd_interrupt_remap_msi() Thomas Huth
2023-08-02 21:12 ` Philippe Mathieu-Daudé
2023-08-02 13:57 ` [PATCH 5/6] hw/i386/x86-iommu: Fix endianness issue in x86_iommu_irq_to_msi_message() Thomas Huth
2023-08-02 21:16 ` Philippe Mathieu-Daudé
2023-08-02 13:57 ` Thomas Huth [this message]
2023-08-02 15:36 ` [PATCH for-8.1 0/6] Fix endianness issues in the intel-iommu device Peter Xu
2023-08-02 15:37 ` Michael S. Tsirkin
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