From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: Fan Ni <fan.ni@samsung.com>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"linux-cxl@vger.kernel.org" <linux-cxl@vger.kernel.org>,
"gregory.price@memverge.com" <gregory.price@memverge.com>,
"hchkuo@avery-design.com.tw" <hchkuo@avery-design.com.tw>,
"cbrowy@avery-design.com" <cbrowy@avery-design.com>,
"ira.weiny@intel.com" <ira.weiny@intel.com>,
"dan.j.williams@intel.com" <dan.j.williams@intel.com>,
Adam Manzanares <a.manzanares@samsung.com>,
"dave@stgolabs.net" <dave@stgolabs.net>,
"nmtadam.samsung@gmail.com" <nmtadam.samsung@gmail.com>,
"nifan@outlook.com" <nifan@outlook.com>
Subject: Re: [Qemu PATCH v2 3/9] include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for type3 memory devices
Date: Fri, 4 Aug 2023 16:27:58 +0100 [thread overview]
Message-ID: <20230804162758.000041ae@Huawei.com> (raw)
In-Reply-To: <20230725183939.2741025-4-fan.ni@samsung.com>
On Tue, 25 Jul 2023 18:39:55 +0000
Fan Ni <fan.ni@samsung.com> wrote:
> From: Fan Ni <nifan@outlook.com>
>
> Rename mem_size as static_mem_size for type3 memdev to cover static RAM and
> pmem capacity, preparing for the introduction of dynamic capacity to support
> dynamic capacity devices.
>
> Signed-off-by: Fan Ni <fan.ni@samsung.com>
Looks good. I've picked this up with the author change.
Note that just because I've starting picking these up, doesn't
mean you can't keep changing them, but if you start from where my
gitlab.com/jic23/qemu tree is that will make life easier given
we have a lot of stuff in flight.
Jonathan
p.s. that assumes I've actually pushed the result of this out before
you get back to it!
> ---
> hw/cxl/cxl-mailbox-utils.c | 5 +++--
> hw/mem/cxl_type3.c | 8 ++++----
> include/hw/cxl/cxl_device.h | 2 +-
> 3 files changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index 0fe9f3eb5d..dd5ea95af8 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -540,7 +540,8 @@ static CXLRetCode cmd_identify_memory_device(struct cxl_cmd *cmd,
>
> snprintf(id->fw_revision, 0x10, "BWFW VERSION %02d", 0);
>
> - stq_le_p(&id->total_capacity, cxl_dstate->mem_size / CXL_CAPACITY_MULTIPLIER);
> + stq_le_p(&id->total_capacity,
> + cxl_dstate->static_mem_size / CXL_CAPACITY_MULTIPLIER);
> stq_le_p(&id->persistent_capacity, cxl_dstate->pmem_size / CXL_CAPACITY_MULTIPLIER);
> stq_le_p(&id->volatile_capacity, cxl_dstate->vmem_size / CXL_CAPACITY_MULTIPLIER);
> stl_le_p(&id->lsa_size, cvc->get_lsa_size(ct3d));
> @@ -879,7 +880,7 @@ static CXLRetCode cmd_media_clear_poison(struct cxl_cmd *cmd,
> struct clear_poison_pl *in = (void *)cmd->payload;
>
> dpa = ldq_le_p(&in->dpa);
> - if (dpa + CXL_CACHE_LINE_SIZE > cxl_dstate->mem_size) {
> + if (dpa + CXL_CACHE_LINE_SIZE > cxl_dstate->static_mem_size) {
> return CXL_MBOX_INVALID_PA;
> }
>
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index 4d68824dfe..3d7acffcb7 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -748,7 +748,7 @@ static bool cxl_setup_memory(CXLType3Dev *ct3d, Error **errp)
> }
> address_space_init(&ct3d->hostvmem_as, vmr, v_name);
> ct3d->cxl_dstate.vmem_size = memory_region_size(vmr);
> - ct3d->cxl_dstate.mem_size += memory_region_size(vmr);
> + ct3d->cxl_dstate.static_mem_size += memory_region_size(vmr);
> g_free(v_name);
> }
>
> @@ -771,7 +771,7 @@ static bool cxl_setup_memory(CXLType3Dev *ct3d, Error **errp)
> }
> address_space_init(&ct3d->hostpmem_as, pmr, p_name);
> ct3d->cxl_dstate.pmem_size = memory_region_size(pmr);
> - ct3d->cxl_dstate.mem_size += memory_region_size(pmr);
> + ct3d->cxl_dstate.static_mem_size += memory_region_size(pmr);
> g_free(p_name);
> }
>
> @@ -984,7 +984,7 @@ static int cxl_type3_hpa_to_as_and_dpa(CXLType3Dev *ct3d,
> return -EINVAL;
> }
>
> - if (*dpa_offset > ct3d->cxl_dstate.mem_size) {
> + if (*dpa_offset > ct3d->cxl_dstate.static_mem_size) {
> return -EINVAL;
> }
>
> @@ -1148,7 +1148,7 @@ static bool set_cacheline(CXLType3Dev *ct3d, uint64_t dpa_offset, uint8_t *data)
> return false;
> }
>
> - if (dpa_offset + CXL_CACHE_LINE_SIZE > ct3d->cxl_dstate.mem_size) {
> + if (dpa_offset + CXL_CACHE_LINE_SIZE > ct3d->cxl_dstate.static_mem_size) {
> return false;
> }
>
> diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
> index dae39da438..503c344326 100644
> --- a/include/hw/cxl/cxl_device.h
> +++ b/include/hw/cxl/cxl_device.h
> @@ -209,7 +209,7 @@ typedef struct cxl_device_state {
> } timestamp;
>
> /* memory region size, HDM */
> - uint64_t mem_size;
> + uint64_t static_mem_size;
> uint64_t pmem_size;
> uint64_t vmem_size;
> bool is_dcd;
next prev parent reply other threads:[~2023-08-04 15:28 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20230725183956uscas1p154e945516c2a4091479f4906d7652648@uscas1p1.samsung.com>
2023-07-25 18:39 ` [Qemu PATCH v2 0/9] Enabling DCD emulation support in Qemu Fan Ni
[not found] ` <CGME20230725183956uscas1p153242eb4b12cb9cb6529476b4e9058c4@uscas1p1.samsung.com>
2023-07-25 18:39 ` [Qemu PATCH v2 3/9] include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for type3 memory devices Fan Ni
2023-08-04 15:27 ` Jonathan Cameron via [this message]
[not found] ` <CGME20230725183956uscas1p296403063c710f4b546d4fec7650915c4@uscas1p2.samsung.com>
2023-07-25 18:39 ` [Qemu PATCH v2 2/9] hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative and mailbox command support Fan Ni
2023-08-04 15:24 ` Jonathan Cameron via
[not found] ` <CGME20230725183956uscas1p17a64ec512cdf5b9348451926d6f0b224@uscas1p1.samsung.com>
2023-07-25 18:39 ` [Qemu PATCH v2 1/9] hw/cxl/cxl-mailbox-utils: Add dc_event_log_size field to output payload of identify memory device command Fan Ni
2023-08-04 14:19 ` Jonathan Cameron via
[not found] ` <CGME20230725183956uscas1p2008fba59779b70405c74d28a30e4fbaa@uscas1p2.samsung.com>
2023-07-25 18:39 ` [Qemu PATCH v2 4/9] hw/mem/cxl_type3: Add support to create DC regions to type3 memory devices Fan Ni
2023-08-04 15:55 ` Jonathan Cameron via
[not found] ` <CGME20230725183957uscas1p2a076b6f7b694d2e632a0b8025ec331d7@uscas1p2.samsung.com>
2023-07-25 18:39 ` [Qemu PATCH v2 7/9] hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response Fan Ni
2023-08-07 11:42 ` Jonathan Cameron via
2023-09-08 13:00 ` Jørgen Hansen
2023-09-08 17:19 ` Fan Ni
[not found] ` <CGME20230725183957uscas1p1eeb8e8eccc6c00b460d183027642374b@uscas1p1.samsung.com>
2023-07-25 18:39 ` [Qemu PATCH v2 5/9] hw/mem/cxl_type3: Add host backend and address space handling for DC regions Fan Ni
2023-07-26 12:53 ` Nathan Fontenot
2023-07-26 16:17 ` nifan
2023-08-04 16:36 ` Jonathan Cameron via
2023-08-04 18:07 ` Gregory Price
2023-08-07 12:10 ` Jonathan Cameron via
[not found] ` <CGME20230725183957uscas1p1ebf676c30d21896d1fd7f9b652250449@uscas1p1.samsung.com>
2023-07-25 18:39 ` [Qemu PATCH v2 8/9] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents Fan Ni
2023-08-07 10:35 ` Jonathan Cameron via
[not found] ` <CGME20230725183957uscas1p28b38d294f90b97f99769466cc533b4de@uscas1p2.samsung.com>
2023-07-25 18:39 ` [Qemu PATCH v2 6/9] hw/mem/cxl_type3: Add DC extent list representative and get DC extent list mailbox support Fan Ni
2023-08-07 11:55 ` Jonathan Cameron via
2023-09-08 13:12 ` Jørgen Hansen
2023-09-08 17:12 ` Fan Ni
[not found] ` <CGME20230725183957uscas1p2ca5293c7229ab989ad1a2d95395436a6@uscas1p2.samsung.com>
2023-07-25 18:39 ` [Qemu PATCH v2 9/9] hw/mem/cxl_type3: Add dpa range validation for accesses to dc regions Fan Ni
2023-08-07 8:53 ` Jonathan Cameron via
2023-08-07 9:37 ` Jonathan Cameron via
2023-08-24 20:49 ` Fan Ni
2023-08-25 11:42 ` Jonathan Cameron via
2023-08-25 16:34 ` Fan Ni
2023-08-30 15:04 ` Jonathan Cameron via
2023-08-30 12:08 ` Jørgen Hansen
2023-08-30 15:37 ` Jonathan Cameron via
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230804162758.000041ae@Huawei.com \
--to=qemu-devel@nongnu.org \
--cc=Jonathan.Cameron@Huawei.com \
--cc=a.manzanares@samsung.com \
--cc=cbrowy@avery-design.com \
--cc=dan.j.williams@intel.com \
--cc=dave@stgolabs.net \
--cc=fan.ni@samsung.com \
--cc=gregory.price@memverge.com \
--cc=hchkuo@avery-design.com.tw \
--cc=ira.weiny@intel.com \
--cc=linux-cxl@vger.kernel.org \
--cc=nifan@outlook.com \
--cc=nmtadam.samsung@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).