From: Nicholas Piggin <npiggin@gmail.com>
To: Daniel Henrique Barboza <danielhb413@gmail.com>
Cc: "Nicholas Piggin" <npiggin@gmail.com>,
"Cédric Le Goater" <clg@kaod.org>,
"David Gibson" <david@gibson.dropbear.id.au>,
"Greg Kurz" <groug@kaod.org>,
"Harsh Prateek Bora" <harshpb@linux.ibm.com>,
"Shivaprasad G Bhat" <sbhat@linux.ibm.com>,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH 3/6] target/ppc: Suppress single step interrupts on rfi-type instructions
Date: Tue, 8 Aug 2023 13:11:13 +1000 [thread overview]
Message-ID: <20230808031116.398205-4-npiggin@gmail.com> (raw)
In-Reply-To: <20230808031116.398205-1-npiggin@gmail.com>
BookS does not take single step interrupts on completion of rfi and
similar (rfid, hrfid, rfscv). This is not a completely clean way to
do it, but in general non-branch instructions that change NIP on
completion are excluded.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/translate.c | 23 +++++++++++++++++------
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 5051596670..6e8f1797ac 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -338,7 +338,7 @@ static void gen_ppc_maybe_interrupt(DisasContext *ctx)
* The exception can be either POWERPC_EXCP_TRACE (on most PowerPCs) or
* POWERPC_EXCP_DEBUG (on BookE).
*/
-static void gen_debug_exception(DisasContext *ctx)
+static void gen_debug_exception(DisasContext *ctx, bool rfi_type)
{
#if !defined(CONFIG_USER_ONLY)
if (ctx->flags & POWERPC_FLAG_DE) {
@@ -357,10 +357,12 @@ static void gen_debug_exception(DisasContext *ctx)
tcg_constant_i32(POWERPC_EXCP_DEBUG));
ctx->base.is_jmp = DISAS_NORETURN;
} else {
- TCGv t0 = tcg_temp_new();
- tcg_gen_movi_tl(t0, ctx->cia);
- gen_helper_book3s_trace(cpu_env, t0);
- ctx->base.is_jmp = DISAS_NORETURN;
+ if (!rfi_type) { /* BookS does not single step rfi type instructions */
+ TCGv t0 = tcg_temp_new();
+ tcg_gen_movi_tl(t0, ctx->cia);
+ gen_helper_book3s_trace(cpu_env, t0);
+ ctx->base.is_jmp = DISAS_NORETURN;
+ }
}
#endif
}
@@ -7412,6 +7414,8 @@ static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
/* Honor single stepping. */
if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP)) {
+ bool rfi_type = false;
+
switch (is_jmp) {
case DISAS_TOO_MANY:
case DISAS_EXIT_UPDATE:
@@ -7420,12 +7424,19 @@ static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
break;
case DISAS_EXIT:
case DISAS_CHAIN:
+ /*
+ * This is a heuristic, to put it kindly. The rfi class of
+ * instructions are among the few outside branches that change
+ * NIP without taking an interrupt. Single step trace interrupts
+ * do not fire on completion of these instructions.
+ */
+ rfi_type = true;
break;
default:
g_assert_not_reached();
}
- gen_debug_exception(ctx);
+ gen_debug_exception(ctx, rfi_type);
return;
}
--
2.40.1
next prev parent reply other threads:[~2023-08-08 3:13 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-08 3:11 [PATCH for-8.2 0/6] ppc: debug facility improvements Nicholas Piggin
2023-08-08 3:11 ` [PATCH 1/6] target/ppc: Remove single-step suppression inside 0x100-0xf00 Nicholas Piggin
2023-08-08 3:11 ` [PATCH 2/6] target/ppc: Improve book3s branch trace interrupt for v2.07S Nicholas Piggin
2023-08-08 3:11 ` Nicholas Piggin [this message]
2023-08-08 3:11 ` [PATCH 4/6] target/ppc: Implement breakpoint debug facility " Nicholas Piggin
2023-08-08 3:11 ` [PATCH 5/6] target/ppc: Implement watchpoint " Nicholas Piggin
2023-08-08 3:11 ` [PATCH 6/6] spapr: implement H_SET_MODE debug facilities Nicholas Piggin
2023-08-29 16:43 ` [PATCH for-8.2 0/6] ppc: debug facility improvements Cédric Le Goater
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