* [PULL 1/2] hw/nvme: fix CRC64 for guard tag
2023-08-08 6:27 [PULL 0/2] hw/nvme late fix Klaus Jensen
@ 2023-08-08 6:27 ` Klaus Jensen
2023-08-08 6:27 ` [PULL 2/2] docs: update hw/nvme documentation for protection information Klaus Jensen
1 sibling, 0 replies; 3+ messages in thread
From: Klaus Jensen @ 2023-08-08 6:27 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: qemu-block, Keith Busch, Kevin Wolf, Hanna Reitz, Klaus Jensen,
Philippe Mathieu-Daudé, Stefan Hajnoczi, Fam Zheng,
Ankit Kumar, qemu-stable, Klaus Jensen
From: Ankit Kumar <ankit.kumar@samsung.com>
The nvme CRC64 generator expects the caller to pass inverted seed value.
Pass inverted crc value for metadata buffer.
Cc: qemu-stable@nongnu.org
Fixes: 44219b6029fc ("hw/nvme: 64-bit pi support")
Signed-off-by: Ankit Kumar <ankit.kumar@samsung.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
---
hw/nvme/dif.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/nvme/dif.c b/hw/nvme/dif.c
index 63c44c86ab55..01b19c33734e 100644
--- a/hw/nvme/dif.c
+++ b/hw/nvme/dif.c
@@ -115,7 +115,7 @@ static void nvme_dif_pract_generate_dif_crc64(NvmeNamespace *ns, uint8_t *buf,
uint64_t crc = crc64_nvme(~0ULL, buf, ns->lbasz);
if (pil) {
- crc = crc64_nvme(crc, mbuf, pil);
+ crc = crc64_nvme(~crc, mbuf, pil);
}
dif->g64.guard = cpu_to_be64(crc);
@@ -246,7 +246,7 @@ static uint16_t nvme_dif_prchk_crc64(NvmeNamespace *ns, NvmeDifTuple *dif,
uint64_t crc = crc64_nvme(~0ULL, buf, ns->lbasz);
if (pil) {
- crc = crc64_nvme(crc, mbuf, pil);
+ crc = crc64_nvme(~crc, mbuf, pil);
}
trace_pci_nvme_dif_prchk_guard_crc64(be64_to_cpu(dif->g64.guard), crc);
--
2.41.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PULL 2/2] docs: update hw/nvme documentation for protection information
2023-08-08 6:27 [PULL 0/2] hw/nvme late fix Klaus Jensen
2023-08-08 6:27 ` [PULL 1/2] hw/nvme: fix CRC64 for guard tag Klaus Jensen
@ 2023-08-08 6:27 ` Klaus Jensen
1 sibling, 0 replies; 3+ messages in thread
From: Klaus Jensen @ 2023-08-08 6:27 UTC (permalink / raw)
To: Peter Maydell, qemu-devel
Cc: qemu-block, Keith Busch, Kevin Wolf, Hanna Reitz, Klaus Jensen,
Philippe Mathieu-Daudé, Stefan Hajnoczi, Fam Zheng,
Ankit Kumar, Klaus Jensen
From: Ankit Kumar <ankit.kumar@samsung.com>
Add missing entry for pif ("protection information format").
Protection information size can be 8 or 16 bytes, Update the pil entry
as per the NVM command set specification.
Signed-off-by: Ankit Kumar <ankit.kumar@samsung.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
---
docs/system/devices/nvme.rst | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/docs/system/devices/nvme.rst b/docs/system/devices/nvme.rst
index 2a3af268f7a5..32ff287cd78e 100644
--- a/docs/system/devices/nvme.rst
+++ b/docs/system/devices/nvme.rst
@@ -271,9 +271,15 @@ The virtual namespace device supports DIF- and DIX-based protection information
``pil=UINT8`` (default: ``0``)
Controls the location of the protection information within the metadata. Set
- to ``1`` to transfer protection information as the first eight bytes of
- metadata. Otherwise, the protection information is transferred as the last
- eight bytes.
+ to ``1`` to transfer protection information as the first bytes of metadata.
+ Otherwise, the protection information is transferred as the last bytes of
+ metadata.
+
+``pif=UINT8`` (default: ``0``)
+ By default, the namespace device uses 16 bit guard protection information
+ format (``pif=0``). Set to ``2`` to enable 64 bit guard protection
+ information format. This requires at least 16 bytes of metadata. Note that
+ ``pif=2`` (32 bit guards) are currently not supported.
Virtualization Enhancements and SR-IOV (Experimental Support)
-------------------------------------------------------------
--
2.41.0
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