From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH v2 07/11] target/arm: Apply access checks to neoverse-v1 special registers
Date: Fri, 11 Aug 2023 14:40:27 -0700 [thread overview]
Message-ID: <20230811214031.171020-8-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230811214031.171020-1-richard.henderson@linaro.org>
There is only one additional EL1 register modeled, which
also needs to use access_actlr_w.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/cpu64.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c
index bc3db798f0..b0cac05be6 100644
--- a/target/arm/tcg/cpu64.c
+++ b/target/arm/tcg/cpu64.c
@@ -560,7 +560,8 @@ static void define_neoverse_n1_cp_reginfo(ARMCPU *cpu)
static const ARMCPRegInfo neoverse_v1_cp_reginfo[] = {
{ .name = "CPUECTLR2_EL1", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 0, .crn = 15, .crm = 1, .opc2 = 5,
- .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
+ .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0,
+ .accessfn = access_actlr_w },
{ .name = "CPUPPMCR_EL3", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 6, .crn = 15, .crm = 2, .opc2 = 0,
.access = PL3_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
--
2.34.1
next prev parent reply other threads:[~2023-08-11 21:43 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-11 21:40 [PATCH v2 00/11] target/arm: Implement cortex-a710 Richard Henderson
2023-08-11 21:40 ` [PATCH v2 01/11] target/arm: Reduce dcz_blocksize to uint8_t Richard Henderson
2023-08-24 16:02 ` Philippe Mathieu-Daudé
2023-08-11 21:40 ` [PATCH v2 02/11] target/arm: Allow cpu to configure GM blocksize Richard Henderson
2023-08-11 21:40 ` [PATCH v2 03/11] target/arm: Support more GM blocksizes Richard Henderson
2023-08-24 15:45 ` Peter Maydell
2023-08-11 21:40 ` [PATCH v2 04/11] target/arm: When tag memory is not present, set MTE=1 Richard Henderson
2023-08-24 15:46 ` Peter Maydell
2023-08-11 21:40 ` [PATCH v2 05/11] target/arm: Introduce make_ccsidr64 Richard Henderson
2023-08-24 15:48 ` Peter Maydell
2023-08-11 21:40 ` [PATCH v2 06/11] target/arm: Apply access checks to neoverse-n1 special registers Richard Henderson
2023-08-24 15:54 ` Peter Maydell
2023-08-11 21:40 ` Richard Henderson [this message]
2023-08-24 15:54 ` [PATCH v2 07/11] target/arm: Apply access checks to neoverse-v1 " Peter Maydell
2023-08-11 21:40 ` [PATCH v2 08/11] target/arm: Implement RMR_EL3 for neoverse-v1 Richard Henderson
2023-08-24 16:08 ` Peter Maydell
2023-08-11 21:40 ` [PATCH v2 09/11] target/arm: Suppress FEAT_TRBE (Trace Buffer Extension) Richard Henderson
2023-08-24 16:09 ` Peter Maydell
2023-08-11 21:40 ` [PATCH v2 10/11] target/arm: Implement FEAT_HPDS2 as a no-op Richard Henderson
2023-08-24 16:19 ` Peter Maydell
2023-08-11 21:40 ` [PATCH v2 11/11] target/arm: Implement cortex-a710 Richard Henderson
2023-08-29 12:38 ` Peter Maydell
2023-08-29 12:40 ` [PATCH v2 00/11] " Peter Maydell
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