From: Qian Wen <qian.wen@intel.com>
To: qemu-devel@nongnu.org
Cc: xiaoyao.li@intel.com, zhao1.liu@intel.com, pbonzini@redhat.com,
richard.henderson@linaro.org, babu.moger@amd.com,
Qian Wen <qian.wen@intel.com>
Subject: [PATCH v3 0/2] Fix overflow of the max number of IDs for logic processor and core
Date: Wed, 16 Aug 2023 16:06:56 +0800 [thread overview]
Message-ID: <20230816080658.3562730-1-qian.wen@intel.com> (raw)
CPUID.1.EBX[23:16]: Maximum number of addressable IDs for logical
processors in this physical package.
CPUID.4:EAX[31:26]: Maximum number of addressable IDs for processor cores
in the physical package.
The current qemu code doesn't limit the value written to these two fields.
If the guest has a huge number of cores, APs (application processor) will
fail to bring up and the wrong info will be reported.
According to HW behavior, setting max value written to CPUID.1.EBX[23:16]
to 255, and CPUID.4:EAX[31:26] to 63.
---
Changes v2 -> v3:
- Add patch 2.
- Revise the commit message and comment to be clearer.
- Using MIN() for limitation.
Changes v1 -> v2:
- Revise the commit message and comment to more clearer.
- Rebased to v8.1.0-rc2.
Qian Wen (2):
target/i386: Avoid cpu number overflow in legacy topology
target/i386: Avoid overflow of the cache parameter enumerated by leaf 4
target/i386/cpu.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
base-commit: 0d52116fd82cdd1f4a88837336af5b6290c364a4
--
2.25.1
next reply other threads:[~2023-08-16 8:05 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-16 8:06 Qian Wen [this message]
2023-08-16 8:06 ` [PATCH v3 1/2] target/i386: Avoid cpu number overflow in legacy topology Qian Wen
2023-08-17 2:04 ` Xiaoyao Li
2023-08-17 19:33 ` Isaku Yamahata
2023-08-16 8:06 ` [PATCH v3 2/2] target/i386: Avoid overflow of the cache parameter enumerated by leaf 4 Qian Wen
2023-08-17 2:07 ` Xiaoyao Li
2023-08-17 19:34 ` Isaku Yamahata
2023-08-17 19:33 ` [PATCH v3 0/2] Fix overflow of the max number of IDs for logic processor and core Isaku Yamahata
2023-08-22 7:56 ` Wen, Qian
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230816080658.3562730-1-qian.wen@intel.com \
--to=qian.wen@intel.com \
--cc=babu.moger@amd.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=xiaoyao.li@intel.com \
--cc=zhao1.liu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).