From: Xiaoyao Li <xiaoyao.li@intel.com>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Ani Sinha" <anisinha@redhat.com>, "Peter Xu" <peterx@redhat.com>,
"David Hildenbrand" <david@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Daniel P. Berrangé" <berrange@redhat.com>,
"Cornelia Huck" <cohuck@redhat.com>,
"Eric Blake" <eblake@redhat.com>,
"Markus Armbruster" <armbru@redhat.com>,
"Marcelo Tosatti" <mtosatti@redhat.com>,
"Gerd Hoffmann" <kraxel@redhat.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org,
Eduardo Habkost <eduardo@habkost.net>,
Laszlo Ersek <lersek@redhat.com>,
xiaoyao.li@intel.com, Isaku Yamahata <isaku.yamahata@gmail.com>,
erdemaktas@google.com, Chenyi Qiang <chenyi.qiang@intel.com>
Subject: [PATCH v2 12/58] i386/kvm: Move architectural CPUID leaf generation to separate helper
Date: Fri, 18 Aug 2023 05:49:55 -0400 [thread overview]
Message-ID: <20230818095041.1973309-13-xiaoyao.li@intel.com> (raw)
In-Reply-To: <20230818095041.1973309-1-xiaoyao.li@intel.com>
From: Sean Christopherson <sean.j.christopherson@intel.com>
Move the architectural (for lack of a better term) CPUID leaf generation
to a separate helper so that the generation code can be reused by TDX,
which needs to generate a canonical VM-scoped configuration.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
target/i386/kvm/kvm.c | 454 +++++++++++++++++++------------------
target/i386/kvm/kvm_i386.h | 3 +
2 files changed, 235 insertions(+), 222 deletions(-)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index 46a455a1e331..9ee41fffc445 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -1799,6 +1799,236 @@ static void kvm_init_nested_state(CPUX86State *env)
}
}
+uint32_t kvm_x86_arch_cpuid(CPUX86State *env, struct kvm_cpuid_entry2 *entries,
+ uint32_t cpuid_i)
+{
+ uint32_t limit, i, j;
+ uint32_t unused;
+ struct kvm_cpuid_entry2 *c;
+
+ cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused);
+
+ for (i = 0; i <= limit; i++) {
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "unsupported level value: 0x%x\n", limit);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+
+ switch (i) {
+ case 2: {
+ /* Keep reading function 2 till all the input is received */
+ int times;
+
+ c->function = i;
+ c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC |
+ KVM_CPUID_FLAG_STATE_READ_NEXT;
+ cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
+ times = c->eax & 0xff;
+
+ for (j = 1; j < times; ++j) {
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "cpuid_data is full, no space for "
+ "cpuid(eax:2):eax & 0xf = 0x%x\n", times);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+ c->function = i;
+ c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC;
+ cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
+ }
+ break;
+ }
+ case 0x1f:
+ if (env->nr_dies < 2) {
+ cpuid_i--;
+ break;
+ }
+ /* fallthrough */
+ case 4:
+ case 0xb:
+ case 0xd:
+ for (j = 0; ; j++) {
+ if (i == 0xd && j == 64) {
+ break;
+ }
+
+ c->function = i;
+ c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
+ c->index = j;
+ cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
+
+ if (i == 4 && c->eax == 0) {
+ break;
+ }
+ if (i == 0xb && !(c->ecx & 0xff00)) {
+ break;
+ }
+ if (i == 0x1f && !(c->ecx & 0xff00)) {
+ break;
+ }
+ if (i == 0xd && c->eax == 0) {
+ continue;
+ }
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "cpuid_data is full, no space for "
+ "cpuid(eax:0x%x,ecx:0x%x)\n", i, j);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+ }
+ break;
+ case 0x7:
+ case 0x12:
+ for (j = 0; ; j++) {
+ c->function = i;
+ c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
+ c->index = j;
+ cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
+
+ if (j > 1 && (c->eax & 0xf) != 1) {
+ break;
+ }
+
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "cpuid_data is full, no space for "
+ "cpuid(eax:0x12,ecx:0x%x)\n", j);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+ }
+ break;
+ case 0x14:
+ case 0x1d:
+ case 0x1e: {
+ uint32_t times;
+
+ c->function = i;
+ c->index = 0;
+ c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
+ cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
+ times = c->eax;
+
+ for (j = 1; j <= times; ++j) {
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "cpuid_data is full, no space for "
+ "cpuid(eax:0x%x,ecx:0x%x)\n", i, j);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+ c->function = i;
+ c->index = j;
+ c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
+ cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
+ }
+ break;
+ }
+ default:
+ c->function = i;
+ c->flags = 0;
+ cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
+ if (!c->eax && !c->ebx && !c->ecx && !c->edx) {
+ /*
+ * KVM already returns all zeroes if a CPUID entry is missing,
+ * so we can omit it and avoid hitting KVM's 80-entry limit.
+ */
+ cpuid_i--;
+ }
+ break;
+ }
+ }
+
+ if (limit >= 0x0a) {
+ uint32_t eax, edx;
+
+ cpu_x86_cpuid(env, 0x0a, 0, &eax, &unused, &unused, &edx);
+
+ has_architectural_pmu_version = eax & 0xff;
+ if (has_architectural_pmu_version > 0) {
+ num_architectural_pmu_gp_counters = (eax & 0xff00) >> 8;
+
+ /* Shouldn't be more than 32, since that's the number of bits
+ * available in EBX to tell us _which_ counters are available.
+ * Play it safe.
+ */
+ if (num_architectural_pmu_gp_counters > MAX_GP_COUNTERS) {
+ num_architectural_pmu_gp_counters = MAX_GP_COUNTERS;
+ }
+
+ if (has_architectural_pmu_version > 1) {
+ num_architectural_pmu_fixed_counters = edx & 0x1f;
+
+ if (num_architectural_pmu_fixed_counters > MAX_FIXED_COUNTERS) {
+ num_architectural_pmu_fixed_counters = MAX_FIXED_COUNTERS;
+ }
+ }
+ }
+ }
+
+ cpu_x86_cpuid(env, 0x80000000, 0, &limit, &unused, &unused, &unused);
+
+ for (i = 0x80000000; i <= limit; i++) {
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "unsupported xlevel value: 0x%x\n", limit);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+
+ switch (i) {
+ case 0x8000001d:
+ /* Query for all AMD cache information leaves */
+ for (j = 0; ; j++) {
+ c->function = i;
+ c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
+ c->index = j;
+ cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
+
+ if (c->eax == 0) {
+ break;
+ }
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "cpuid_data is full, no space for "
+ "cpuid(eax:0x%x,ecx:0x%x)\n", i, j);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+ }
+ break;
+ default:
+ c->function = i;
+ c->flags = 0;
+ cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
+ if (!c->eax && !c->ebx && !c->ecx && !c->edx) {
+ /*
+ * KVM already returns all zeroes if a CPUID entry is missing,
+ * so we can omit it and avoid hitting KVM's 80-entry limit.
+ */
+ cpuid_i--;
+ }
+ break;
+ }
+ }
+
+ /* Call Centaur's CPUID instructions they are supported. */
+ if (env->cpuid_xlevel2 > 0) {
+ cpu_x86_cpuid(env, 0xC0000000, 0, &limit, &unused, &unused, &unused);
+
+ for (i = 0xC0000000; i <= limit; i++) {
+ if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
+ fprintf(stderr, "unsupported xlevel2 value: 0x%x\n", limit);
+ abort();
+ }
+ c = &entries[cpuid_i++];
+
+ c->function = i;
+ c->flags = 0;
+ cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
+ }
+ }
+
+ return cpuid_i;
+}
+
int kvm_arch_init_vcpu(CPUState *cs)
{
struct {
@@ -1815,8 +2045,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
X86CPU *cpu = X86_CPU(cs);
CPUX86State *env = &cpu->env;
- uint32_t limit, i, j, cpuid_i;
- uint32_t unused;
+ uint32_t cpuid_i;
struct kvm_cpuid_entry2 *c;
uint32_t signature[3];
int kvm_base = KVM_CPUID_SIGNATURE;
@@ -1965,8 +2194,6 @@ int kvm_arch_init_vcpu(CPUState *cs)
c->edx = env->features[FEAT_KVM_HINTS];
}
- cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused);
-
if (cpu->kvm_pv_enforce_cpuid) {
r = kvm_vcpu_enable_cap(cs, KVM_CAP_ENFORCE_PV_FEATURE_CPUID, 0, 1);
if (r < 0) {
@@ -1977,224 +2204,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
}
}
- for (i = 0; i <= limit; i++) {
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "unsupported level value: 0x%x\n", limit);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
-
- switch (i) {
- case 2: {
- /* Keep reading function 2 till all the input is received */
- int times;
-
- c->function = i;
- c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC |
- KVM_CPUID_FLAG_STATE_READ_NEXT;
- cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
- times = c->eax & 0xff;
-
- for (j = 1; j < times; ++j) {
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "cpuid_data is full, no space for "
- "cpuid(eax:2):eax & 0xf = 0x%x\n", times);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
- c->function = i;
- c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC;
- cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
- }
- break;
- }
- case 0x1f:
- if (env->nr_dies < 2) {
- cpuid_i--;
- break;
- }
- /* fallthrough */
- case 4:
- case 0xb:
- case 0xd:
- for (j = 0; ; j++) {
- if (i == 0xd && j == 64) {
- break;
- }
-
- c->function = i;
- c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
- c->index = j;
- cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
-
- if (i == 4 && c->eax == 0) {
- break;
- }
- if (i == 0xb && !(c->ecx & 0xff00)) {
- break;
- }
- if (i == 0x1f && !(c->ecx & 0xff00)) {
- break;
- }
- if (i == 0xd && c->eax == 0) {
- continue;
- }
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "cpuid_data is full, no space for "
- "cpuid(eax:0x%x,ecx:0x%x)\n", i, j);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
- }
- break;
- case 0x7:
- case 0x12:
- for (j = 0; ; j++) {
- c->function = i;
- c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
- c->index = j;
- cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
-
- if (j > 1 && (c->eax & 0xf) != 1) {
- break;
- }
-
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "cpuid_data is full, no space for "
- "cpuid(eax:0x12,ecx:0x%x)\n", j);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
- }
- break;
- case 0x14:
- case 0x1d:
- case 0x1e: {
- uint32_t times;
-
- c->function = i;
- c->index = 0;
- c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
- cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
- times = c->eax;
-
- for (j = 1; j <= times; ++j) {
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "cpuid_data is full, no space for "
- "cpuid(eax:0x%x,ecx:0x%x)\n", i, j);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
- c->function = i;
- c->index = j;
- c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
- cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
- }
- break;
- }
- default:
- c->function = i;
- c->flags = 0;
- cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
- if (!c->eax && !c->ebx && !c->ecx && !c->edx) {
- /*
- * KVM already returns all zeroes if a CPUID entry is missing,
- * so we can omit it and avoid hitting KVM's 80-entry limit.
- */
- cpuid_i--;
- }
- break;
- }
- }
-
- if (limit >= 0x0a) {
- uint32_t eax, edx;
-
- cpu_x86_cpuid(env, 0x0a, 0, &eax, &unused, &unused, &edx);
-
- has_architectural_pmu_version = eax & 0xff;
- if (has_architectural_pmu_version > 0) {
- num_architectural_pmu_gp_counters = (eax & 0xff00) >> 8;
-
- /* Shouldn't be more than 32, since that's the number of bits
- * available in EBX to tell us _which_ counters are available.
- * Play it safe.
- */
- if (num_architectural_pmu_gp_counters > MAX_GP_COUNTERS) {
- num_architectural_pmu_gp_counters = MAX_GP_COUNTERS;
- }
-
- if (has_architectural_pmu_version > 1) {
- num_architectural_pmu_fixed_counters = edx & 0x1f;
-
- if (num_architectural_pmu_fixed_counters > MAX_FIXED_COUNTERS) {
- num_architectural_pmu_fixed_counters = MAX_FIXED_COUNTERS;
- }
- }
- }
- }
-
- cpu_x86_cpuid(env, 0x80000000, 0, &limit, &unused, &unused, &unused);
-
- for (i = 0x80000000; i <= limit; i++) {
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "unsupported xlevel value: 0x%x\n", limit);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
-
- switch (i) {
- case 0x8000001d:
- /* Query for all AMD cache information leaves */
- for (j = 0; ; j++) {
- c->function = i;
- c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
- c->index = j;
- cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
-
- if (c->eax == 0) {
- break;
- }
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "cpuid_data is full, no space for "
- "cpuid(eax:0x%x,ecx:0x%x)\n", i, j);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
- }
- break;
- default:
- c->function = i;
- c->flags = 0;
- cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
- if (!c->eax && !c->ebx && !c->ecx && !c->edx) {
- /*
- * KVM already returns all zeroes if a CPUID entry is missing,
- * so we can omit it and avoid hitting KVM's 80-entry limit.
- */
- cpuid_i--;
- }
- break;
- }
- }
-
- /* Call Centaur's CPUID instructions they are supported. */
- if (env->cpuid_xlevel2 > 0) {
- cpu_x86_cpuid(env, 0xC0000000, 0, &limit, &unused, &unused, &unused);
-
- for (i = 0xC0000000; i <= limit; i++) {
- if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
- fprintf(stderr, "unsupported xlevel2 value: 0x%x\n", limit);
- abort();
- }
- c = &cpuid_data.entries[cpuid_i++];
-
- c->function = i;
- c->flags = 0;
- cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
- }
- }
-
+ cpuid_i = kvm_x86_arch_cpuid(env, cpuid_data.entries, cpuid_i);
cpuid_data.cpuid.nent = cpuid_i;
if (((env->cpuid_version >> 8)&0xF) >= 6
diff --git a/target/i386/kvm/kvm_i386.h b/target/i386/kvm/kvm_i386.h
index 769eadbba56c..fd7e76fcf847 100644
--- a/target/i386/kvm/kvm_i386.h
+++ b/target/i386/kvm/kvm_i386.h
@@ -26,6 +26,9 @@
#define kvm_ioapic_in_kernel() \
(kvm_irqchip_in_kernel() && !kvm_irqchip_is_split())
+uint32_t kvm_x86_arch_cpuid(CPUX86State *env, struct kvm_cpuid_entry2 *entries,
+ uint32_t cpuid_i);
+
#else
#define kvm_pit_in_kernel() 0
--
2.34.1
next prev parent reply other threads:[~2023-08-18 9:56 UTC|newest]
Thread overview: 118+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-18 9:49 [PATCH v2 00/58] TDX QEMU support Xiaoyao Li
2023-08-18 9:49 ` [PATCH v2 01/58] *** HACK *** linux-headers: Update headers to pull in TDX API changes Xiaoyao Li
2023-08-18 9:49 ` [PATCH v2 02/58] i386: Introduce tdx-guest object Xiaoyao Li
2023-08-22 6:22 ` Markus Armbruster
2023-08-23 7:27 ` Xiaoyao Li
2023-08-23 11:14 ` Markus Armbruster
2023-08-18 9:49 ` [PATCH v2 03/58] target/i386: Parse TDX vm type Xiaoyao Li
2023-08-21 8:27 ` Daniel P. Berrangé
2023-08-21 13:37 ` Xiaoyao Li
2023-08-18 9:49 ` [PATCH v2 04/58] target/i386: Introduce kvm_confidential_guest_init() Xiaoyao Li
2023-08-29 14:42 ` Philippe Mathieu-Daudé
2023-08-18 9:49 ` [PATCH v2 05/58] i386/tdx: Implement tdx_kvm_init() to initialize TDX VM context Xiaoyao Li
2023-08-18 9:49 ` [PATCH v2 06/58] i386/tdx: Get tdx_capabilities via KVM_TDX_CAPABILITIES Xiaoyao Li
2023-08-21 8:46 ` Daniel P. Berrangé
2023-08-22 7:31 ` Xiaoyao Li
2023-08-22 8:19 ` Daniel P. Berrangé
2023-08-18 9:49 ` [PATCH v2 07/58] i386/tdx: Introduce is_tdx_vm() helper and cache tdx_guest object Xiaoyao Li
2023-08-21 8:48 ` Daniel P. Berrangé
2023-08-22 7:46 ` Xiaoyao Li
2023-08-18 9:49 ` [PATCH v2 08/58] i386/tdx: Adjust the supported CPUID based on TDX restrictions Xiaoyao Li
2023-08-21 23:00 ` Isaku Yamahata
2023-08-23 3:59 ` Xiaoyao Li
2023-10-10 1:02 ` Tina Zhang
2023-10-10 5:29 ` Xiaoyao Li
2023-08-18 9:49 ` [PATCH v2 09/58] i386/tdx: Update tdx_cpuid_lookup[].tdx_fixed0/1 by tdx_caps.cpuid_config[] Xiaoyao Li
2023-08-18 9:49 ` [PATCH v2 10/58] i386/tdx: Integrate tdx_caps->xfam_fixed0/1 into tdx_cpuid_lookup Xiaoyao Li
2023-08-18 9:49 ` [PATCH v2 11/58] i386/tdx: Integrate tdx_caps->attrs_fixed0/1 to tdx_cpuid_lookup Xiaoyao Li
2023-08-18 9:49 ` Xiaoyao Li [this message]
2023-08-18 9:49 ` [PATCH v2 13/58] kvm: Introduce kvm_arch_pre_create_vcpu() Xiaoyao Li
2023-08-21 8:55 ` Daniel P. Berrangé
2023-08-29 14:40 ` Philippe Mathieu-Daudé
2023-08-30 1:45 ` Xiaoyao Li
2023-08-30 16:54 ` Isaku Yamahata
2023-08-18 9:49 ` [PATCH v2 14/58] i386/tdx: Initialize TDX before creating TD vcpus Xiaoyao Li
2023-08-21 8:54 ` Daniel P. Berrangé
2023-08-18 9:49 ` [PATCH v2 15/58] i386/tdx: Add property sept-ve-disable for tdx-guest object Xiaoyao Li
2023-08-21 8:59 ` Daniel P. Berrangé
2023-08-22 6:27 ` Markus Armbruster
2023-08-22 8:39 ` Xiaoyao Li
2023-08-18 9:49 ` [PATCH v2 16/58] i386/tdx: Make sept_ve_disable set by default Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 17/58] i386/tdx: Wire CPU features up with attributes of TD guest Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 18/58] i386/tdx: Validate TD attributes Xiaoyao Li
2023-08-21 9:16 ` Daniel P. Berrangé
2023-08-22 14:21 ` Xiaoyao Li
2023-08-22 14:30 ` Xiaoyao Li
2023-08-22 14:42 ` Daniel P. Berrangé
2023-08-23 7:31 ` Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 19/58] qom: implement property helper for sha384 Xiaoyao Li
2023-08-21 9:25 ` Daniel P. Berrangé
2023-08-21 23:28 ` Isaku Yamahata
2023-08-18 9:50 ` [PATCH v2 20/58] i386/tdx: Allows mrconfigid/mrowner/mrownerconfig for TDX_INIT_VM Xiaoyao Li
2023-08-21 9:29 ` Daniel P. Berrangé
2023-08-22 6:35 ` Markus Armbruster
2023-08-18 9:50 ` [PATCH v2 21/58] i386/tdx: Implement user specified tsc frequency Xiaoyao Li
2023-08-21 9:30 ` Daniel P. Berrangé
2023-08-18 9:50 ` [PATCH v2 22/58] i386/tdx: Set kvm_readonly_mem_enabled to false for TDX VM Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 23/58] i386/tdx: Make memory type private by default Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 24/58] i386/tdx: Create kvm gmem for TD Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 25/58] kvm/tdx: Don't complain when converting vMMIO region to shared Xiaoyao Li
2023-08-21 9:34 ` Daniel P. Berrangé
2023-08-18 9:50 ` [PATCH v2 26/58] kvm/tdx: Ignore memory conversion to shared of unassigned region Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 27/58] i386/tdvf: Introduce function to parse TDVF metadata Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 28/58] i386/tdx: Parse TDVF metadata for TDX VM Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 29/58] i386/tdx: Skip BIOS shadowing setup Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 30/58] i386/tdx: Don't initialize pc.rom for TDX VMs Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 31/58] i386/tdx: Track mem_ptr for each firmware entry of TDVF Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 32/58] i386/tdx: Track RAM entries for TDX VM Xiaoyao Li
2023-08-21 9:38 ` Daniel P. Berrangé
2023-08-22 15:39 ` Xiaoyao Li
2023-08-21 23:40 ` Isaku Yamahata
2023-08-22 15:45 ` Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 33/58] headers: Add definitions from UEFI spec for volumes, resources, etc Xiaoyao Li
2023-08-23 19:41 ` Isaku Yamahata
2023-08-24 7:50 ` Xiaoyao Li
2023-08-24 7:55 ` Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 34/58] i386/tdx: Setup the TD HOB list Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 35/58] i386/tdx: Add TDVF memory via KVM_TDX_INIT_MEM_REGION Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 36/58] memory: Introduce memory_region_init_ram_gmem() Xiaoyao Li
2023-08-21 9:40 ` Daniel P. Berrangé
2023-08-29 14:33 ` Philippe Mathieu-Daudé
2023-08-30 1:53 ` Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 37/58] i386/tdx: register TDVF as private memory Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 38/58] i386/tdx: Call KVM_TDX_INIT_VCPU to initialize TDX vcpu Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 39/58] i386/tdx: Finalize TDX VM Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 40/58] i386/tdx: handle TDG.VP.VMCALL<SetupEventNotifyInterrupt> Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 41/58] i386/tdx: handle TDG.VP.VMCALL<GetQuote> Xiaoyao Li
2023-08-22 6:52 ` Markus Armbruster
2023-08-22 8:24 ` Daniel P. Berrangé
2023-08-29 5:31 ` Chenyi Qiang
2023-08-29 10:25 ` Daniel P. Berrangé
2023-08-30 5:18 ` Chenyi Qiang
2023-08-30 5:57 ` Xiaoyao Li
2023-08-30 7:48 ` Daniel P. Berrangé
2023-08-31 6:49 ` Xiaoyao Li
2023-09-26 20:33 ` Markus Armbruster
2023-08-18 9:50 ` [PATCH v2 42/58] i386/tdx: register the fd read callback with the main loop to read the quote data Xiaoyao Li
2023-08-24 6:27 ` Chenyi Qiang
2023-08-18 9:50 ` [PATCH v2 45/58] i386/tdx: Limit the range size for MapGPA Xiaoyao Li
2023-08-21 22:30 ` Isaku Yamahata
2023-08-18 9:50 ` [PATCH v2 46/58] i386/tdx: Handle TDG.VP.VMCALL<REPORT_FATAL_ERROR> Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 47/58] i386/tdx: Wire REPORT_FATAL_ERROR with GuestPanic facility Xiaoyao Li
2023-08-21 9:58 ` Daniel P. Berrangé
2023-08-28 13:14 ` Xiaoyao Li
2023-08-29 10:28 ` Daniel P. Berrangé
2023-08-30 2:15 ` Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 48/58] i386/tdx: Disable SMM for TDX VMs Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 49/58] i386/tdx: Disable PIC " Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 50/58] i386/tdx: Don't allow system reset " Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 51/58] i386/tdx: LMCE is not supported for TDX Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 52/58] hw/i386: add eoi_intercept_unsupported member to X86MachineState Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 53/58] hw/i386: add option to forcibly report edge trigger in acpi tables Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 54/58] i386/tdx: Don't synchronize guest tsc for TDs Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 55/58] i386/tdx: Only configure MSR_IA32_UCODE_REV in kvm_init_msrs() " Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 56/58] i386/tdx: Skip kvm_put_apicbase() " Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 57/58] i386/tdx: Don't get/put guest state for TDX VMs Xiaoyao Li
2023-08-18 9:50 ` [PATCH v2 58/58] docs: Add TDX documentation Xiaoyao Li
[not found] ` <20230818095041.1973309-44-xiaoyao.li@intel.com>
2023-08-24 7:21 ` [PATCH v2 43/58] i386/tdx: setup a timer for the qio channel Chenyi Qiang
2023-08-24 8:34 ` Xiaoyao Li
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