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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Huacai Chen" <chenhuacai@loongson.cn>,
	"Xiaojuan Yang" <yangxiaojuan@loongson.cn>,
	"Alex Bennée" <alex.bennee@linaro.org>, "Jiajie Chen" <c@jia.je>,
	"Song Gao" <gaosong@loongson.cn>,
	"Richard Henderson" <richard.henderson@linaro.org>
Subject: [PATCH v2 6/8] target/loongarch: Add function to check current arch
Date: Fri, 18 Aug 2023 19:20:14 +0200	[thread overview]
Message-ID: <20230818172016.24504-7-philmd@linaro.org> (raw)
In-Reply-To: <20230818172016.24504-1-philmd@linaro.org>

From: Jiajie Chen <c@jia.je>

Add is_la64 function to check if the current cpucfg[1].arch equals to
2(LA64).

Signed-off-by: Jiajie Chen <c@jia.je>
Co-authored-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-ID: <20230817093121.1053890-2-gaosong@loongson.cn>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/loongarch/cpu.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index c50b3a5ef3..3235ad081f 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -132,6 +132,11 @@ FIELD(CPUCFG1, HP, 24, 1)
 FIELD(CPUCFG1, IOCSR_BRD, 25, 1)
 FIELD(CPUCFG1, MSG_INT, 26, 1)
 
+/* cpucfg[1].arch */
+#define CPUCFG1_ARCH_LA32R       0
+#define CPUCFG1_ARCH_LA32        1
+#define CPUCFG1_ARCH_LA64        2
+
 /* cpucfg[2] bits */
 FIELD(CPUCFG2, FP, 0, 1)
 FIELD(CPUCFG2, FP_SP, 1, 1)
@@ -421,6 +426,11 @@ static inline int cpu_mmu_index(CPULoongArchState *env, bool ifetch)
 #endif
 }
 
+static inline bool is_la64(CPULoongArchState *env)
+{
+    return FIELD_EX32(env->cpucfg[1], CPUCFG1, ARCH) == CPUCFG1_ARCH_LA64;
+}
+
 /*
  * LoongArch CPUs hardware flags.
  */
-- 
2.41.0



  parent reply	other threads:[~2023-08-18 17:21 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-18 17:20 [PATCH v2 0/8] target/loongarch: Cleanups in preparation of loongarch32 support Philippe Mathieu-Daudé
2023-08-18 17:20 ` [PATCH v2 1/8] target/loongarch: Log I/O write accesses to CSR registers Philippe Mathieu-Daudé
2023-08-19  7:33   ` gaosong
2023-08-18 17:20 ` [PATCH v2 2/8] target/loongarch: Remove duplicated disas_set_info assignment Philippe Mathieu-Daudé
2023-08-19  7:34   ` gaosong
2023-08-18 17:20 ` [PATCH v2 3/8] target/loongarch: Fix loongarch_la464_initfn() misses setting LSPW Philippe Mathieu-Daudé
2023-08-18 17:20 ` [PATCH v2 4/8] target/loongarch: Introduce abstract TYPE_LOONGARCH64_CPU Philippe Mathieu-Daudé
2023-08-18 17:33   ` Richard Henderson
2023-08-18 17:20 ` [PATCH v2 5/8] target/loongarch: Extract 64-bit specifics to loongarch64_cpu_class_init Philippe Mathieu-Daudé
2023-08-18 17:32   ` Richard Henderson
2023-08-18 17:20 ` Philippe Mathieu-Daudé [this message]
2023-08-18 17:20 ` [PATCH v2 7/8] target/loongarch: Add new object class for loongarch32 cpus Philippe Mathieu-Daudé
2023-08-18 17:20 ` [PATCH v2 8/8] target/loongarch: Add GDB support for loongarch32 mode Philippe Mathieu-Daudé

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