From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH] target/arm: Use deposit_z() in BCF opcode
Date: Tue, 22 Aug 2023 11:51:56 +0200 [thread overview]
Message-ID: <20230822095156.39868-1-philmd@linaro.org> (raw)
When clearing a bitfield we don't need to lead the
source register. Use deposit_z_i32() with the BFC
opcode to save a load_reg() call.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/arm/tcg/translate.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c
index b71ac2d0d5..1a6938d1b3 100644
--- a/target/arm/tcg/translate.c
+++ b/target/arm/tcg/translate.c
@@ -7255,7 +7255,7 @@ static bool trans_UBFX(DisasContext *s, arg_UBFX *a)
static bool trans_BFCI(DisasContext *s, arg_BFCI *a)
{
int msb = a->msb, lsb = a->lsb;
- TCGv_i32 t_in, t_rd;
+ TCGv_i32 t_rd;
int width;
if (!ENABLE_ARCH_6T2) {
@@ -7268,15 +7268,14 @@ static bool trans_BFCI(DisasContext *s, arg_BFCI *a)
}
width = msb + 1 - lsb;
+ t_rd = load_reg(s, a->rd);
if (a->rn == 15) {
/* BFC */
- t_in = tcg_constant_i32(0);
+ tcg_gen_deposit_z_i32(t_rd, t_rd, lsb, width);
} else {
/* BFI */
- t_in = load_reg(s, a->rn);
+ tcg_gen_deposit_i32(t_rd, t_rd, load_reg(s, a->rn), lsb, width);
}
- t_rd = load_reg(s, a->rd);
- tcg_gen_deposit_i32(t_rd, t_rd, t_in, lsb, width);
store_reg(s, a->rd, t_rd);
return true;
}
--
2.41.0
next reply other threads:[~2023-08-22 9:52 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-22 9:51 Philippe Mathieu-Daudé [this message]
2023-08-22 14:56 ` [PATCH] target/arm: Use deposit_z() in BCF opcode Richard Henderson
2023-08-29 13:20 ` Peter Maydell
2023-08-29 15:53 ` Philippe Mathieu-Daudé
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