From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Song Gao" <gaosong@loongson.cn>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Greg Kurz" <groug@kaod.org>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Peter Maydell" <peter.maydell@linaro.org>,
qemu-ppc@nongnu.org,
"Daniel Henrique Barboza" <danielhb413@gmail.com>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"David Gibson" <david@gibson.dropbear.id.au>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Yoshinori Sato" <ysato@users.sourceforge.jp>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Xiaojuan Yang" <yangxiaojuan@loongson.cn>,
qemu-arm@nongnu.org
Subject: [PATCH 02/12] target/arm: Use generic hrev32_i32() in ARM REV16 and VREV16 opcodes
Date: Tue, 22 Aug 2023 14:40:32 +0200 [thread overview]
Message-ID: <20230822124042.54739-3-philmd@linaro.org> (raw)
In-Reply-To: <20230822124042.54739-1-philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/arm/tcg/translate-a32.h | 1 -
target/arm/tcg/translate-neon.c | 2 +-
target/arm/tcg/translate.c | 14 +-------------
3 files changed, 2 insertions(+), 15 deletions(-)
diff --git a/target/arm/tcg/translate-a32.h b/target/arm/tcg/translate-a32.h
index 0c8f408eea..6cc02c83b9 100644
--- a/target/arm/tcg/translate-a32.h
+++ b/target/arm/tcg/translate-a32.h
@@ -45,7 +45,6 @@ void gen_lookup_tb(DisasContext *s);
long vfp_reg_offset(bool dp, unsigned reg);
long neon_full_reg_offset(unsigned reg);
long neon_element_offset(int reg, int element, MemOp memop);
-void gen_rev16(TCGv_i32 dest, TCGv_i32 var);
void clear_eci_state(DisasContext *s);
bool mve_eci_check(DisasContext *s);
void mve_update_eci(DisasContext *s);
diff --git a/target/arm/tcg/translate-neon.c b/target/arm/tcg/translate-neon.c
index 0e59b03ff9..9489dc0b3e 100644
--- a/target/arm/tcg/translate-neon.c
+++ b/target/arm/tcg/translate-neon.c
@@ -3528,7 +3528,7 @@ static bool trans_VREV16(DisasContext *s, arg_2misc *a)
if (a->size != 0) {
return false;
}
- return do_2misc(s, a, gen_rev16);
+ return do_2misc(s, a, tcg_gen_hrev32_i32);
}
static bool trans_VCLS(DisasContext *s, arg_2misc *a)
diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c
index 39a42611c6..4ebf04f4de 100644
--- a/target/arm/tcg/translate.c
+++ b/target/arm/tcg/translate.c
@@ -416,18 +416,6 @@ static void gen_smul_dual(TCGv_i32 a, TCGv_i32 b)
tcg_gen_mov_i32(a, tmp1);
}
-/* Byteswap each halfword. */
-void gen_rev16(TCGv_i32 dest, TCGv_i32 var)
-{
- TCGv_i32 tmp = tcg_temp_new_i32();
- TCGv_i32 mask = tcg_constant_i32(0x00ff00ff);
- tcg_gen_shri_i32(tmp, var, 8);
- tcg_gen_and_i32(tmp, tmp, mask);
- tcg_gen_and_i32(var, var, mask);
- tcg_gen_shli_i32(var, var, 8);
- tcg_gen_or_i32(dest, var, tmp);
-}
-
/* Byteswap low halfword and sign extend. */
static void gen_revsh(TCGv_i32 dest, TCGv_i32 var)
{
@@ -7578,7 +7566,7 @@ static bool trans_REV16(DisasContext *s, arg_rr *a)
if (!ENABLE_ARCH_6) {
return false;
}
- return op_rr(s, a, gen_rev16);
+ return op_rr(s, a, tcg_gen_hrev32_i32);
}
static bool trans_REVSH(DisasContext *s, arg_rr *a)
--
2.41.0
next prev parent reply other threads:[~2023-08-22 12:42 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-22 12:40 [PATCH 00/12] tcg: Factor hrev{32,64}_{i32,i64,tl} out Philippe Mathieu-Daudé
2023-08-22 12:40 ` [PATCH 01/12] tcg/tcg-op: Factor tcg_gen_hrev32_i32() out Philippe Mathieu-Daudé
2023-08-22 12:40 ` Philippe Mathieu-Daudé [this message]
2023-08-22 12:40 ` [PATCH 03/12] target/cris: Use generic hrev32_i32() in SWAPB opcode Philippe Mathieu-Daudé
2023-08-22 13:27 ` Philippe Mathieu-Daudé
2023-08-22 12:40 ` [PATCH 04/12] target/rx: Use generic hrev32_i32() in REVW opcode Philippe Mathieu-Daudé
2023-08-22 12:40 ` [PATCH 05/12] tcg/tcg-op: Factor tcg_gen_hrev64_i64() out Philippe Mathieu-Daudé
2023-08-22 12:46 ` [PATCH 10/12] target/arm: Use generic hrev_i64() in Aarch64 REV16 opcode Philippe Mathieu-Daudé
2023-08-22 12:47 ` [PATCH 09/12] tcg/tcg-op: Add tcg_gen_hrev32_i64() and tcg_gen_hrev_i64() Philippe Mathieu-Daudé
2023-08-22 12:51 ` [PATCH 08/12] target/loongarch: Use generic hrev64_i64() in REVB.4H opcode Philippe Mathieu-Daudé
2023-08-22 13:28 ` Philippe Mathieu-Daudé
2023-08-22 14:02 ` Philippe Mathieu-Daudé
2023-08-22 12:52 ` [PATCH 11/12] target/loongarch: Use generic hrev64_i32() in REVB.2H opcode Philippe Mathieu-Daudé
2023-08-22 13:30 ` Philippe Mathieu-Daudé
2023-08-22 16:11 ` Philippe Mathieu-Daudé
2023-08-22 17:04 ` Richard Henderson
2023-08-22 12:53 ` [PATCH 07/12] target/ppc: Use generic hrev64_i64() in BRH / BSWAP16x8 opcodes Philippe Mathieu-Daudé
2023-08-22 19:35 ` Daniel Henrique Barboza
2023-08-25 7:38 ` Nicholas Piggin
2023-08-22 12:57 ` [PATCH 06/12] target/mips: Use generic hrev64_i64() in DSBH opcode Philippe Mathieu-Daudé
2023-08-22 12:57 ` [PATCH 12/12] target/mips: Use generic hrev32_tl() in WSBH opcode Philippe Mathieu-Daudé
2023-08-22 15:42 ` Richard Henderson
2023-08-22 16:59 ` Philippe Mathieu-Daudé
2023-08-22 15:37 ` [PATCH 00/12] tcg: Factor hrev{32,64}_{i32,i64,tl} out Richard Henderson
2023-08-25 7:58 ` Nicholas Piggin
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