From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Song Gao" <gaosong@loongson.cn>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Greg Kurz" <groug@kaod.org>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Peter Maydell" <peter.maydell@linaro.org>,
qemu-ppc@nongnu.org,
"Daniel Henrique Barboza" <danielhb413@gmail.com>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"David Gibson" <david@gibson.dropbear.id.au>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Yoshinori Sato" <ysato@users.sourceforge.jp>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Xiaojuan Yang" <yangxiaojuan@loongson.cn>,
qemu-arm@nongnu.org
Subject: [PATCH 05/12] tcg/tcg-op: Factor tcg_gen_hrev64_i64() out
Date: Tue, 22 Aug 2023 14:40:35 +0200 [thread overview]
Message-ID: <20230822124042.54739-6-philmd@linaro.org> (raw)
In-Reply-To: <20230822124042.54739-1-philmd@linaro.org>
Similarly to tcg_gen_hrev32_i32() for 32-bit values,
extract tcg_gen_hrev64_i64() for 64-bit ones.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
docs/devel/tcg-ops.rst | 4 +++-
include/tcg/tcg-op-common.h | 1 +
tcg/tcg-op.c | 29 +++++++++++++++++++++++------
3 files changed, 27 insertions(+), 7 deletions(-)
diff --git a/docs/devel/tcg-ops.rst b/docs/devel/tcg-ops.rst
index 17965faa03..e8a2f8aacc 100644
--- a/docs/devel/tcg-ops.rst
+++ b/docs/devel/tcg-ops.rst
@@ -492,7 +492,9 @@ Misc
* - hrev32_i32 *t0*, *t1*
- - | Byteswap each halfword within a 32-bit value.
+ hrev64_i64 *t0*, *t1*
+
+ - | Byteswap each halfword within a 32/64-bit value.
* - hswap_i32/i64 *t0*, *t1*
diff --git a/include/tcg/tcg-op-common.h b/include/tcg/tcg-op-common.h
index bb515dfd51..a9184caf9d 100644
--- a/include/tcg/tcg-op-common.h
+++ b/include/tcg/tcg-op-common.h
@@ -562,6 +562,7 @@ void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg, int flags);
void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
void tcg_gen_hswap_i64(TCGv_i64 ret, TCGv_i64 arg);
void tcg_gen_wswap_i64(TCGv_i64 ret, TCGv_i64 arg);
+void tcg_gen_hrev64_i64(TCGv_i64 ret, TCGv_i64 arg);
void tcg_gen_smin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index b1b5d9b45b..310acce410 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -1876,12 +1876,7 @@ void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg)
TCGv_i64 t2 = tcg_temp_ebb_new_i64();
/* arg = abcdefgh */
- tcg_gen_movi_i64(t2, 0x00ff00ff00ff00ffull);
- tcg_gen_shri_i64(t0, arg, 8); /* t0 = .abcdefg */
- tcg_gen_and_i64(t1, arg, t2); /* t1 = .b.d.f.h */
- tcg_gen_and_i64(t0, t0, t2); /* t0 = .a.c.e.g */
- tcg_gen_shli_i64(t1, t1, 8); /* t1 = b.d.f.h. */
- tcg_gen_or_i64(ret, t0, t1); /* ret = badcfehg */
+ tcg_gen_hrev64_i64(ret, arg); /* ret = badcfehg */
tcg_gen_movi_i64(t2, 0x0000ffff0000ffffull);
tcg_gen_shri_i64(t0, ret, 16); /* t0 = ..badcfe */
@@ -1936,6 +1931,28 @@ void tcg_gen_wswap_i64(TCGv_i64 ret, TCGv_i64 arg)
tcg_gen_rotli_i64(ret, arg, 32);
}
+/*
+ * hrev64_i64: Byteswap each halfwords within a 64-bit value.
+ *
+ * Byte pattern: hrev64_i64(abcdefgh) -> badcfehg
+ */
+void tcg_gen_hrev64_i64(TCGv_i64 ret, TCGv_i64 arg)
+{
+ TCGv_i64 mask = tcg_constant_i64(0x00ff00ff00ff00ffull);
+ TCGv_i64 t1 = tcg_temp_ebb_new_i64();
+ TCGv_i64 t2 = tcg_temp_ebb_new_i64();
+
+ /* arg = abcdefgh */
+ tcg_gen_shri_i64(t1, arg, 8); /* t1 = .abcdefg */
+ tcg_gen_and_i64(t2, t1, mask); /* t2 = .a.c.e.g */
+ tcg_gen_and_i64(t1, arg, mask); /* t1 = .b.d.f.h */
+ tcg_gen_shli_i64(t1, t1, 8); /* t1 = b.d.f.h. */
+ tcg_gen_or_i64(ret, t1, t2); /* ret = badcfehg */
+
+ tcg_temp_free_i64(t1);
+ tcg_temp_free_i64(t2);
+}
+
void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg)
{
if (TCG_TARGET_REG_BITS == 32) {
--
2.41.0
next prev parent reply other threads:[~2023-08-22 12:42 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-22 12:40 [PATCH 00/12] tcg: Factor hrev{32,64}_{i32,i64,tl} out Philippe Mathieu-Daudé
2023-08-22 12:40 ` [PATCH 01/12] tcg/tcg-op: Factor tcg_gen_hrev32_i32() out Philippe Mathieu-Daudé
2023-08-22 12:40 ` [PATCH 02/12] target/arm: Use generic hrev32_i32() in ARM REV16 and VREV16 opcodes Philippe Mathieu-Daudé
2023-08-22 12:40 ` [PATCH 03/12] target/cris: Use generic hrev32_i32() in SWAPB opcode Philippe Mathieu-Daudé
2023-08-22 13:27 ` Philippe Mathieu-Daudé
2023-08-22 12:40 ` [PATCH 04/12] target/rx: Use generic hrev32_i32() in REVW opcode Philippe Mathieu-Daudé
2023-08-22 12:40 ` Philippe Mathieu-Daudé [this message]
2023-08-22 12:46 ` [PATCH 10/12] target/arm: Use generic hrev_i64() in Aarch64 REV16 opcode Philippe Mathieu-Daudé
2023-08-22 12:47 ` [PATCH 09/12] tcg/tcg-op: Add tcg_gen_hrev32_i64() and tcg_gen_hrev_i64() Philippe Mathieu-Daudé
2023-08-22 12:51 ` [PATCH 08/12] target/loongarch: Use generic hrev64_i64() in REVB.4H opcode Philippe Mathieu-Daudé
2023-08-22 13:28 ` Philippe Mathieu-Daudé
2023-08-22 14:02 ` Philippe Mathieu-Daudé
2023-08-22 12:52 ` [PATCH 11/12] target/loongarch: Use generic hrev64_i32() in REVB.2H opcode Philippe Mathieu-Daudé
2023-08-22 13:30 ` Philippe Mathieu-Daudé
2023-08-22 16:11 ` Philippe Mathieu-Daudé
2023-08-22 17:04 ` Richard Henderson
2023-08-22 12:53 ` [PATCH 07/12] target/ppc: Use generic hrev64_i64() in BRH / BSWAP16x8 opcodes Philippe Mathieu-Daudé
2023-08-22 19:35 ` Daniel Henrique Barboza
2023-08-25 7:38 ` Nicholas Piggin
2023-08-22 12:57 ` [PATCH 06/12] target/mips: Use generic hrev64_i64() in DSBH opcode Philippe Mathieu-Daudé
2023-08-22 12:57 ` [PATCH 12/12] target/mips: Use generic hrev32_tl() in WSBH opcode Philippe Mathieu-Daudé
2023-08-22 15:42 ` Richard Henderson
2023-08-22 16:59 ` Philippe Mathieu-Daudé
2023-08-22 15:37 ` [PATCH 00/12] tcg: Factor hrev{32,64}_{i32,i64,tl} out Richard Henderson
2023-08-25 7:58 ` Nicholas Piggin
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