From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>
Subject: [PULL 13/48] tcg/i386: Allow immediate as input to deposit_*
Date: Wed, 23 Aug 2023 13:22:51 -0700 [thread overview]
Message-ID: <20230823202326.1353645-14-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230823202326.1353645-1-richard.henderson@linaro.org>
We can use MOVB and MOVW with an immediate just as easily
as with a register input.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/i386/tcg-target-con-set.h | 2 +-
tcg/i386/tcg-target.c.inc | 26 ++++++++++++++++++++++----
2 files changed, 23 insertions(+), 5 deletions(-)
diff --git a/tcg/i386/tcg-target-con-set.h b/tcg/i386/tcg-target-con-set.h
index 3949d49538..7d00a7dde8 100644
--- a/tcg/i386/tcg-target-con-set.h
+++ b/tcg/i386/tcg-target-con-set.h
@@ -33,7 +33,7 @@ C_O1_I1(r, q)
C_O1_I1(r, r)
C_O1_I1(x, r)
C_O1_I1(x, x)
-C_O1_I2(q, 0, q)
+C_O1_I2(q, 0, qi)
C_O1_I2(q, r, re)
C_O1_I2(r, 0, ci)
C_O1_I2(r, 0, r)
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index ba40dd0f4d..3045b56002 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -276,6 +276,7 @@ static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
#define OPC_MOVL_GvEv (0x8b) /* loads, more or less */
#define OPC_MOVB_EvIz (0xc6)
#define OPC_MOVL_EvIz (0xc7)
+#define OPC_MOVB_Ib (0xb0)
#define OPC_MOVL_Iv (0xb8)
#define OPC_MOVBE_GyMy (0xf0 | P_EXT38)
#define OPC_MOVBE_MyGy (0xf1 | P_EXT38)
@@ -2750,13 +2751,30 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
OP_32_64(deposit):
if (args[3] == 0 && args[4] == 8) {
/* load bits 0..7 */
- tcg_out_modrm(s, OPC_MOVB_EvGv | P_REXB_R | P_REXB_RM, a2, a0);
+ if (const_a2) {
+ tcg_out_opc(s, OPC_MOVB_Ib | P_REXB_RM | LOWREGMASK(a0),
+ 0, a0, 0);
+ tcg_out8(s, a2);
+ } else {
+ tcg_out_modrm(s, OPC_MOVB_EvGv | P_REXB_R | P_REXB_RM, a2, a0);
+ }
} else if (TCG_TARGET_REG_BITS == 32 && args[3] == 8 && args[4] == 8) {
/* load bits 8..15 */
- tcg_out_modrm(s, OPC_MOVB_EvGv, a2, a0 + 4);
+ if (const_a2) {
+ tcg_out8(s, OPC_MOVB_Ib + a0 + 4);
+ tcg_out8(s, a2);
+ } else {
+ tcg_out_modrm(s, OPC_MOVB_EvGv, a2, a0 + 4);
+ }
} else if (args[3] == 0 && args[4] == 16) {
/* load bits 0..15 */
- tcg_out_modrm(s, OPC_MOVL_EvGv | P_DATA16, a2, a0);
+ if (const_a2) {
+ tcg_out_opc(s, OPC_MOVL_Iv | P_DATA16 | LOWREGMASK(a0),
+ 0, a0, 0);
+ tcg_out16(s, a2);
+ } else {
+ tcg_out_modrm(s, OPC_MOVL_EvGv | P_DATA16, a2, a0);
+ }
} else {
g_assert_not_reached();
}
@@ -3311,7 +3329,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
case INDEX_op_deposit_i32:
case INDEX_op_deposit_i64:
- return C_O1_I2(q, 0, q);
+ return C_O1_I2(q, 0, qi);
case INDEX_op_setcond_i32:
case INDEX_op_setcond_i64:
--
2.34.1
next prev parent reply other threads:[~2023-08-23 20:28 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-23 20:22 [PULL 00/48] tcg patch queue Richard Henderson
2023-08-23 20:22 ` [PULL 01/48] accel/kvm: Widen pc/saved_insn for kvm_sw_breakpoint Richard Henderson
2023-08-23 20:22 ` [PULL 02/48] accel/hvf: Widen pc/saved_insn for hvf_sw_breakpoint Richard Henderson
2023-08-23 20:22 ` [PULL 03/48] sysemu/kvm: Use vaddr for kvm_arch_[insert|remove]_hw_breakpoint Richard Henderson
2023-08-23 20:22 ` [PULL 04/48] sysemu/hvf: Use vaddr for hvf_arch_[insert|remove]_hw_breakpoint Richard Henderson
2023-08-23 20:22 ` [PULL 05/48] include/exec: Replace target_ulong with abi_ptr in cpu_[st|ld]*() Richard Henderson
2023-08-23 20:22 ` [PULL 06/48] include/exec: typedef abi_ptr to vaddr in softmmu Richard Henderson
2023-08-23 20:22 ` [PULL 07/48] include/exec: Widen tlb_hit/tlb_hit_page() Richard Henderson
2023-08-23 20:22 ` [PULL 08/48] accel/tcg: Widen address arg in tlb_compare_set() Richard Henderson
2023-08-23 20:22 ` [PULL 09/48] accel/tcg: Update run_on_cpu_data static assert Richard Henderson
2023-08-23 20:22 ` [PULL 10/48] target/m68k: Use tcg_gen_deposit_i32 in gen_partset_reg Richard Henderson
2023-08-23 20:22 ` [PULL 11/48] tcg/i386: Drop BYTEH deposits for 64-bit Richard Henderson
2023-08-23 20:22 ` [PULL 12/48] tcg: Fold deposit with zero to and Richard Henderson
2023-08-23 20:22 ` Richard Henderson [this message]
2023-08-23 20:22 ` [PULL 14/48] docs/devel/tcg-ops: Bury mentions of trunc_shr_i64_i32() Richard Henderson
2023-08-23 20:22 ` [PULL 15/48] tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32 Richard Henderson
2023-08-23 20:22 ` [PULL 16/48] tcg: Introduce negsetcond opcodes Richard Henderson
2023-08-23 20:22 ` [PULL 17/48] tcg: Use tcg_gen_negsetcond_* Richard Henderson
2023-08-23 20:22 ` [PULL 18/48] target/alpha: Use tcg_gen_movcond_i64 in gen_fold_mzero Richard Henderson
2023-08-23 20:22 ` [PULL 19/48] target/arm: Use tcg_gen_negsetcond_* Richard Henderson
2023-08-23 20:22 ` [PULL 20/48] target/m68k: " Richard Henderson
2023-08-23 20:22 ` [PULL 21/48] target/openrisc: " Richard Henderson
2023-08-23 20:23 ` [PULL 22/48] target/ppc: " Richard Henderson
2023-08-23 20:23 ` [PULL 23/48] target/sparc: Use tcg_gen_movcond_i64 in gen_edge Richard Henderson
2023-08-23 20:23 ` [PULL 24/48] target/tricore: Replace gen_cond_w with tcg_gen_negsetcond_tl Richard Henderson
2023-08-23 20:23 ` [PULL 25/48] tcg/ppc: Implement negsetcond_* Richard Henderson
2023-08-23 20:23 ` [PULL 26/48] tcg/ppc: Use the Set Boolean Extension Richard Henderson
2023-08-23 20:23 ` [PULL 27/48] tcg/aarch64: Implement negsetcond_* Richard Henderson
2023-08-23 20:23 ` [PULL 28/48] tcg/arm: Implement negsetcond_i32 Richard Henderson
2023-08-23 20:23 ` [PULL 29/48] tcg/riscv: Implement negsetcond_* Richard Henderson
2023-08-23 20:23 ` [PULL 30/48] tcg/s390x: " Richard Henderson
2023-08-23 20:23 ` [PULL 31/48] tcg/sparc64: " Richard Henderson
2023-08-23 20:23 ` [PULL 32/48] tcg/i386: Merge tcg_out_brcond{32,64} Richard Henderson
2023-08-23 20:23 ` [PULL 33/48] tcg/i386: Merge tcg_out_setcond{32,64} Richard Henderson
2023-08-23 20:23 ` [PULL 34/48] tcg/i386: Merge tcg_out_movcond{32,64} Richard Henderson
2023-08-23 20:23 ` [PULL 35/48] tcg/i386: Use CMP+SBB in tcg_out_setcond Richard Henderson
2023-08-23 20:23 ` [PULL 36/48] tcg/i386: Clear dest first in tcg_out_setcond if possible Richard Henderson
2023-08-23 20:23 ` [PULL 37/48] tcg/i386: Use shift in tcg_out_setcond Richard Henderson
2023-08-23 20:23 ` [PULL 38/48] tcg/i386: Implement negsetcond_* Richard Henderson
2023-08-23 20:23 ` [PULL 39/48] tcg/tcg-op: Document bswap16_i32() byte pattern Richard Henderson
2023-08-23 20:23 ` [PULL 40/48] tcg/tcg-op: Document bswap16_i64() " Richard Henderson
2023-08-23 20:23 ` [PULL 41/48] tcg/tcg-op: Document bswap32_i32() " Richard Henderson
2023-08-23 20:23 ` [PULL 42/48] tcg/tcg-op: Document bswap32_i64() " Richard Henderson
2023-08-23 20:23 ` [PULL 43/48] tcg/tcg-op: Document bswap64_i64() " Richard Henderson
2023-08-23 20:23 ` [PULL 44/48] tcg/tcg-op: Document hswap_i32/64() " Richard Henderson
2023-08-23 20:23 ` [PULL 45/48] tcg/tcg-op: Document wswap_i64() " Richard Henderson
2023-08-23 20:23 ` [PULL 46/48] target/cris: Fix a typo in gen_swapr() Richard Henderson
2023-08-23 20:23 ` [PULL 47/48] docs/devel/tcg-ops: fix missing newlines in "Host vector operations" Richard Henderson
2023-08-23 20:23 ` [PULL 48/48] tcg: spelling fixes Richard Henderson
2023-08-24 14:05 ` [PULL 00/48] tcg patch queue Stefan Hajnoczi
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