From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>
Subject: [PULL 19/48] target/arm: Use tcg_gen_negsetcond_*
Date: Wed, 23 Aug 2023 13:22:57 -0700 [thread overview]
Message-ID: <20230823202326.1353645-20-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230823202326.1353645-1-richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/translate-a64.c | 22 +++++++++-------------
target/arm/tcg/translate.c | 12 ++++--------
2 files changed, 13 insertions(+), 21 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 5fa1257d32..da686cc953 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -4935,9 +4935,12 @@ static void disas_cond_select(DisasContext *s, uint32_t insn)
if (rn == 31 && rm == 31 && (else_inc ^ else_inv)) {
/* CSET & CSETM. */
- tcg_gen_setcond_i64(tcg_invert_cond(c.cond), tcg_rd, c.value, zero);
if (else_inv) {
- tcg_gen_neg_i64(tcg_rd, tcg_rd);
+ tcg_gen_negsetcond_i64(tcg_invert_cond(c.cond),
+ tcg_rd, c.value, zero);
+ } else {
+ tcg_gen_setcond_i64(tcg_invert_cond(c.cond),
+ tcg_rd, c.value, zero);
}
} else {
TCGv_i64 t_true = cpu_reg(s, rn);
@@ -8670,13 +8673,10 @@ static void handle_3same_64(DisasContext *s, int opcode, bool u,
}
break;
case 0x6: /* CMGT, CMHI */
- /* 64 bit integer comparison, result = test ? (2^64 - 1) : 0.
- * We implement this using setcond (test) and then negating.
- */
cond = u ? TCG_COND_GTU : TCG_COND_GT;
do_cmop:
- tcg_gen_setcond_i64(cond, tcg_rd, tcg_rn, tcg_rm);
- tcg_gen_neg_i64(tcg_rd, tcg_rd);
+ /* 64 bit integer comparison, result = test ? -1 : 0. */
+ tcg_gen_negsetcond_i64(cond, tcg_rd, tcg_rn, tcg_rm);
break;
case 0x7: /* CMGE, CMHS */
cond = u ? TCG_COND_GEU : TCG_COND_GE;
@@ -9265,14 +9265,10 @@ static void handle_2misc_64(DisasContext *s, int opcode, bool u,
}
break;
case 0xa: /* CMLT */
- /* 64 bit integer comparison against zero, result is
- * test ? (2^64 - 1) : 0. We implement via setcond(!test) and
- * subtracting 1.
- */
cond = TCG_COND_LT;
do_cmop:
- tcg_gen_setcondi_i64(cond, tcg_rd, tcg_rn, 0);
- tcg_gen_neg_i64(tcg_rd, tcg_rd);
+ /* 64 bit integer comparison against zero, result is test ? -1 : 0. */
+ tcg_gen_negsetcond_i64(cond, tcg_rd, tcg_rn, tcg_constant_i64(0));
break;
case 0x8: /* CMGT, CMGE */
cond = u ? TCG_COND_GE : TCG_COND_GT;
diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c
index b71ac2d0d5..31d3130e4c 100644
--- a/target/arm/tcg/translate.c
+++ b/target/arm/tcg/translate.c
@@ -2946,13 +2946,11 @@ void gen_gvec_sqrdmlsh_qc(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs,
#define GEN_CMP0(NAME, COND) \
static void gen_##NAME##0_i32(TCGv_i32 d, TCGv_i32 a) \
{ \
- tcg_gen_setcondi_i32(COND, d, a, 0); \
- tcg_gen_neg_i32(d, d); \
+ tcg_gen_negsetcond_i32(COND, d, a, tcg_constant_i32(0)); \
} \
static void gen_##NAME##0_i64(TCGv_i64 d, TCGv_i64 a) \
{ \
- tcg_gen_setcondi_i64(COND, d, a, 0); \
- tcg_gen_neg_i64(d, d); \
+ tcg_gen_negsetcond_i64(COND, d, a, tcg_constant_i64(0)); \
} \
static void gen_##NAME##0_vec(unsigned vece, TCGv_vec d, TCGv_vec a) \
{ \
@@ -3863,15 +3861,13 @@ void gen_gvec_mls(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs,
static void gen_cmtst_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
{
tcg_gen_and_i32(d, a, b);
- tcg_gen_setcondi_i32(TCG_COND_NE, d, d, 0);
- tcg_gen_neg_i32(d, d);
+ tcg_gen_negsetcond_i32(TCG_COND_NE, d, d, tcg_constant_i32(0));
}
void gen_cmtst_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b)
{
tcg_gen_and_i64(d, a, b);
- tcg_gen_setcondi_i64(TCG_COND_NE, d, d, 0);
- tcg_gen_neg_i64(d, d);
+ tcg_gen_negsetcond_i64(TCG_COND_NE, d, d, tcg_constant_i64(0));
}
static void gen_cmtst_vec(unsigned vece, TCGv_vec d, TCGv_vec a, TCGv_vec b)
--
2.34.1
next prev parent reply other threads:[~2023-08-23 20:27 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-23 20:22 [PULL 00/48] tcg patch queue Richard Henderson
2023-08-23 20:22 ` [PULL 01/48] accel/kvm: Widen pc/saved_insn for kvm_sw_breakpoint Richard Henderson
2023-08-23 20:22 ` [PULL 02/48] accel/hvf: Widen pc/saved_insn for hvf_sw_breakpoint Richard Henderson
2023-08-23 20:22 ` [PULL 03/48] sysemu/kvm: Use vaddr for kvm_arch_[insert|remove]_hw_breakpoint Richard Henderson
2023-08-23 20:22 ` [PULL 04/48] sysemu/hvf: Use vaddr for hvf_arch_[insert|remove]_hw_breakpoint Richard Henderson
2023-08-23 20:22 ` [PULL 05/48] include/exec: Replace target_ulong with abi_ptr in cpu_[st|ld]*() Richard Henderson
2023-08-23 20:22 ` [PULL 06/48] include/exec: typedef abi_ptr to vaddr in softmmu Richard Henderson
2023-08-23 20:22 ` [PULL 07/48] include/exec: Widen tlb_hit/tlb_hit_page() Richard Henderson
2023-08-23 20:22 ` [PULL 08/48] accel/tcg: Widen address arg in tlb_compare_set() Richard Henderson
2023-08-23 20:22 ` [PULL 09/48] accel/tcg: Update run_on_cpu_data static assert Richard Henderson
2023-08-23 20:22 ` [PULL 10/48] target/m68k: Use tcg_gen_deposit_i32 in gen_partset_reg Richard Henderson
2023-08-23 20:22 ` [PULL 11/48] tcg/i386: Drop BYTEH deposits for 64-bit Richard Henderson
2023-08-23 20:22 ` [PULL 12/48] tcg: Fold deposit with zero to and Richard Henderson
2023-08-23 20:22 ` [PULL 13/48] tcg/i386: Allow immediate as input to deposit_* Richard Henderson
2023-08-23 20:22 ` [PULL 14/48] docs/devel/tcg-ops: Bury mentions of trunc_shr_i64_i32() Richard Henderson
2023-08-23 20:22 ` [PULL 15/48] tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32 Richard Henderson
2023-08-23 20:22 ` [PULL 16/48] tcg: Introduce negsetcond opcodes Richard Henderson
2023-08-23 20:22 ` [PULL 17/48] tcg: Use tcg_gen_negsetcond_* Richard Henderson
2023-08-23 20:22 ` [PULL 18/48] target/alpha: Use tcg_gen_movcond_i64 in gen_fold_mzero Richard Henderson
2023-08-23 20:22 ` Richard Henderson [this message]
2023-08-23 20:22 ` [PULL 20/48] target/m68k: Use tcg_gen_negsetcond_* Richard Henderson
2023-08-23 20:22 ` [PULL 21/48] target/openrisc: " Richard Henderson
2023-08-23 20:23 ` [PULL 22/48] target/ppc: " Richard Henderson
2023-08-23 20:23 ` [PULL 23/48] target/sparc: Use tcg_gen_movcond_i64 in gen_edge Richard Henderson
2023-08-23 20:23 ` [PULL 24/48] target/tricore: Replace gen_cond_w with tcg_gen_negsetcond_tl Richard Henderson
2023-08-23 20:23 ` [PULL 25/48] tcg/ppc: Implement negsetcond_* Richard Henderson
2023-08-23 20:23 ` [PULL 26/48] tcg/ppc: Use the Set Boolean Extension Richard Henderson
2023-08-23 20:23 ` [PULL 27/48] tcg/aarch64: Implement negsetcond_* Richard Henderson
2023-08-23 20:23 ` [PULL 28/48] tcg/arm: Implement negsetcond_i32 Richard Henderson
2023-08-23 20:23 ` [PULL 29/48] tcg/riscv: Implement negsetcond_* Richard Henderson
2023-08-23 20:23 ` [PULL 30/48] tcg/s390x: " Richard Henderson
2023-08-23 20:23 ` [PULL 31/48] tcg/sparc64: " Richard Henderson
2023-08-23 20:23 ` [PULL 32/48] tcg/i386: Merge tcg_out_brcond{32,64} Richard Henderson
2023-08-23 20:23 ` [PULL 33/48] tcg/i386: Merge tcg_out_setcond{32,64} Richard Henderson
2023-08-23 20:23 ` [PULL 34/48] tcg/i386: Merge tcg_out_movcond{32,64} Richard Henderson
2023-08-23 20:23 ` [PULL 35/48] tcg/i386: Use CMP+SBB in tcg_out_setcond Richard Henderson
2023-08-23 20:23 ` [PULL 36/48] tcg/i386: Clear dest first in tcg_out_setcond if possible Richard Henderson
2023-08-23 20:23 ` [PULL 37/48] tcg/i386: Use shift in tcg_out_setcond Richard Henderson
2023-08-23 20:23 ` [PULL 38/48] tcg/i386: Implement negsetcond_* Richard Henderson
2023-08-23 20:23 ` [PULL 39/48] tcg/tcg-op: Document bswap16_i32() byte pattern Richard Henderson
2023-08-23 20:23 ` [PULL 40/48] tcg/tcg-op: Document bswap16_i64() " Richard Henderson
2023-08-23 20:23 ` [PULL 41/48] tcg/tcg-op: Document bswap32_i32() " Richard Henderson
2023-08-23 20:23 ` [PULL 42/48] tcg/tcg-op: Document bswap32_i64() " Richard Henderson
2023-08-23 20:23 ` [PULL 43/48] tcg/tcg-op: Document bswap64_i64() " Richard Henderson
2023-08-23 20:23 ` [PULL 44/48] tcg/tcg-op: Document hswap_i32/64() " Richard Henderson
2023-08-23 20:23 ` [PULL 45/48] tcg/tcg-op: Document wswap_i64() " Richard Henderson
2023-08-23 20:23 ` [PULL 46/48] target/cris: Fix a typo in gen_swapr() Richard Henderson
2023-08-23 20:23 ` [PULL 47/48] docs/devel/tcg-ops: fix missing newlines in "Host vector operations" Richard Henderson
2023-08-23 20:23 ` [PULL 48/48] tcg: spelling fixes Richard Henderson
2023-08-24 14:05 ` [PULL 00/48] tcg patch queue Stefan Hajnoczi
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