From: Rayhan Faizel <rayhan.faizel@gmail.com>
To: qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, richard.henderson@linaro.org,
eduardo@habkost.net, Rayhan Faizel <rayhan.faizel@gmail.com>
Subject: [PATCH] target/i386/tcg: Check for valid descriptor table before loading segment descriptor
Date: Thu, 24 Aug 2023 16:16:38 +0530 [thread overview]
Message-ID: <20230824104637.216258-2-rayhan.faizel@gmail.com> (raw)
LSL and LAR can cause segmentation faults in certain scenarios under QEMU.
This occurs particularly when the base of either GDT or LDT depending on
bit 2 of selector is NULL.
On real CPU, invalid LSL/LAR does nothing besides clearing ZF.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1376
Signed-off-by: Rayhan Faizel <rayhan.faizel@gmail.com>
---
target/i386/tcg/seg_helper.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/i386/tcg/seg_helper.c b/target/i386/tcg/seg_helper.c
index e8d19c65fd..4c36462162 100644
--- a/target/i386/tcg/seg_helper.c
+++ b/target/i386/tcg/seg_helper.c
@@ -78,6 +78,10 @@ static inline int load_segment_ra(CPUX86State *env, uint32_t *e1_ptr,
} else {
dt = &env->gdt;
}
+ /* Check valid DT base before fetching segment descriptor*/
+ if (!dt->base) {
+ return -1;
+ }
index = selector & ~7;
if ((index + 7) > dt->limit) {
return -1;
--
2.41.0
reply other threads:[~2023-08-24 13:15 UTC|newest]
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