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From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
To: qemu-devel@nongnu.org
Cc: anton.kochkov@proton.me, kbastian@mail.uni-paderborn.de
Subject: [PATCH 09/10] target/tricore: Replace cpu_*_code with translator_*
Date: Sat, 26 Aug 2023 18:02:41 +0200	[thread overview]
Message-ID: <20230826160242.312052-10-kbastian@mail.uni-paderborn.de> (raw)
In-Reply-To: <20230826160242.312052-1-kbastian@mail.uni-paderborn.de>

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
---
 target/tricore/translate.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index a68660b326..89ed48c951 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -8400,7 +8400,7 @@ static bool insn_crosses_page(CPUTriCoreState *env, DisasContext *ctx)
      * 4 bytes from the page boundary, so we cross the page if the first
      * 16 bits indicate that this is a 32 bit insn.
      */
-    uint16_t insn = cpu_lduw_code(env, ctx->base.pc_next);
+    uint16_t insn = translator_lduw(env, &ctx->base, ctx->base.pc_next);
 
     return !tricore_insn_is_16bit(insn);
 }
@@ -8413,14 +8413,15 @@ static void tricore_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
     uint16_t insn_lo;
     bool is_16bit;
 
-    insn_lo = cpu_lduw_code(env, ctx->base.pc_next);
+    insn_lo = translator_lduw(env, &ctx->base, ctx->base.pc_next);
     is_16bit = tricore_insn_is_16bit(insn_lo);
     if (is_16bit) {
         ctx->opcode = insn_lo;
         ctx->pc_succ_insn = ctx->base.pc_next + 2;
         decode_16Bit_opc(ctx);
     } else {
-        uint32_t insn_hi = cpu_lduw_code(env, ctx->base.pc_next + 2);
+        uint32_t insn_hi = translator_lduw(env, &ctx->base,
+                                           ctx->base.pc_next + 2);
         ctx->opcode = insn_hi << 16 | insn_lo;
         ctx->pc_succ_insn = ctx->base.pc_next + 4;
         decode_32Bit_opc(ctx);
-- 
2.41.0



  parent reply	other threads:[~2023-08-26 16:04 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-26 16:02 [PATCH 00/10] TriCore 1.6.2 insn and bugfixes Bastian Koppelmann
2023-08-26 16:02 ` [PATCH 01/10] tests/tcg/tricore: Bump cpu to tc37x Bastian Koppelmann
2023-08-27  4:23   ` Richard Henderson
2023-08-26 16:02 ` [PATCH 02/10] target/tricore: Implement CRCN insn Bastian Koppelmann
2023-08-27  4:33   ` Richard Henderson
2023-08-26 16:02 ` [PATCH 03/10] target/tricore: Correctly handle FPU RM from PSW Bastian Koppelmann
2023-08-27  4:37   ` Richard Henderson
2023-08-26 16:02 ` [PATCH 04/10] target/tricore: Implement FTOU insn Bastian Koppelmann
2023-08-27  4:50   ` Richard Henderson
2023-08-27 11:07     ` Bastian Koppelmann
2023-08-27 14:49       ` Richard Henderson
2023-08-27 16:36         ` Bastian Koppelmann
2023-08-27 18:32           ` Richard Henderson
2023-08-27 18:59             ` Bastian Koppelmann
2023-08-26 16:02 ` [PATCH 05/10] target/tricore: Implement ftohp insn Bastian Koppelmann
2023-08-27  4:55   ` Richard Henderson
2023-08-27  7:09     ` Bastian Koppelmann
2023-08-27 14:51       ` Richard Henderson
2023-08-26 16:02 ` [PATCH 06/10] target/tricore: Implement hptof insn Bastian Koppelmann
2023-08-27  4:56   ` Richard Henderson
2023-08-26 16:02 ` [PATCH 07/10] target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0 Bastian Koppelmann
2023-08-27  4:59   ` Richard Henderson
2023-08-26 16:02 ` [PATCH 08/10] target/tricore: Swap src and dst reg for RCRR_INSERT Bastian Koppelmann
2023-08-27  5:06   ` Richard Henderson
2023-08-27  7:18     ` Bastian Koppelmann
2023-08-26 16:02 ` Bastian Koppelmann [this message]
2023-08-27  5:06   ` [PATCH 09/10] target/tricore: Replace cpu_*_code with translator_* Richard Henderson
2023-08-26 16:02 ` [PATCH 10/10] target/tricore: Fix FTOUZ being ISA v1.3.1 up Bastian Koppelmann
2023-08-27  5:06   ` Richard Henderson

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