From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
To: qemu-devel@nongnu.org
Cc: anton.kochkov@proton.me, kbastian@mail.uni-paderborn.de
Subject: [PATCH 04/10] target/tricore: Implement FTOU insn
Date: Sat, 26 Aug 2023 18:02:36 +0200 [thread overview]
Message-ID: <20230826160242.312052-5-kbastian@mail.uni-paderborn.de> (raw)
In-Reply-To: <20230826160242.312052-1-kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
---
target/tricore/fpu_helper.c | 25 +++++++++++++++++++++++
target/tricore/helper.h | 1 +
target/tricore/translate.c | 3 +++
tests/tcg/tricore/Makefile.softmmu-target | 1 +
tests/tcg/tricore/asm/test_ftou.S | 12 +++++++++++
5 files changed, 42 insertions(+)
create mode 100644 tests/tcg/tricore/asm/test_ftou.S
diff --git a/target/tricore/fpu_helper.c b/target/tricore/fpu_helper.c
index cb7ee7dd35..ceacb6657e 100644
--- a/target/tricore/fpu_helper.c
+++ b/target/tricore/fpu_helper.c
@@ -429,6 +429,31 @@ uint32_t helper_ftoiz(CPUTriCoreState *env, uint32_t arg)
return result;
}
+uint32_t helper_ftou(CPUTriCoreState *env, uint32_t arg)
+{
+ float32 f_arg = make_float32(arg);
+ uint32_t result;
+ int32_t flags = 0;
+
+ if (float32_is_any_nan(f_arg)) {
+ result = 0;
+ flags |= float_flag_invalid;
+ } else if (float32_lt_quiet(f_arg, 0, &env->fp_status)) {
+ result = 0;
+ flags = float_flag_invalid;
+ } else {
+ result = float32_to_uint32(f_arg, &env->fp_status);
+ flags = f_get_excp_flags(env);
+ }
+
+ if (flags) {
+ f_update_psw_flags(env, flags);
+ } else {
+ env->FPU_FS = 0;
+ }
+ return result;
+}
+
uint32_t helper_ftouz(CPUTriCoreState *env, uint32_t arg)
{
float32 f_arg = make_float32(arg);
diff --git a/target/tricore/helper.h b/target/tricore/helper.h
index 190645413a..827fbaa692 100644
--- a/target/tricore/helper.h
+++ b/target/tricore/helper.h
@@ -114,6 +114,7 @@ DEF_HELPER_2(ftoi, i32, env, i32)
DEF_HELPER_2(itof, i32, env, i32)
DEF_HELPER_2(utof, i32, env, i32)
DEF_HELPER_2(ftoiz, i32, env, i32)
+DEF_HELPER_2(ftou, i32, env, i32)
DEF_HELPER_2(ftouz, i32, env, i32)
DEF_HELPER_2(updfl, void, env, i32)
/* dvinit */
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index bb7dad75d6..fb9a7113a8 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -6273,6 +6273,9 @@ static void decode_rr_divide(DisasContext *ctx)
case OPC2_32_RR_ITOF:
gen_helper_itof(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]);
break;
+ case OPC2_32_RR_FTOU:
+ gen_helper_ftou(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]);
+ break;
case OPC2_32_RR_FTOUZ:
gen_helper_ftouz(cpu_gpr_d[r3], cpu_env, cpu_gpr_d[r1]);
break;
diff --git a/tests/tcg/tricore/Makefile.softmmu-target b/tests/tcg/tricore/Makefile.softmmu-target
index 7a7d73a60c..e6ed5c56f2 100644
--- a/tests/tcg/tricore/Makefile.softmmu-target
+++ b/tests/tcg/tricore/Makefile.softmmu-target
@@ -15,6 +15,7 @@ TESTS += test_dvstep.asm.tst
TESTS += test_fadd.asm.tst
TESTS += test_fmul.asm.tst
TESTS += test_ftoi.asm.tst
+TESTS += test_ftou.asm.tst
TESTS += test_imask.asm.tst
TESTS += test_insert.asm.tst
TESTS += test_ld_bu.asm.tst
diff --git a/tests/tcg/tricore/asm/test_ftou.S b/tests/tcg/tricore/asm/test_ftou.S
new file mode 100644
index 0000000000..10f106ad62
--- /dev/null
+++ b/tests/tcg/tricore/asm/test_ftou.S
@@ -0,0 +1,12 @@
+#include "macros.h"
+.text
+.global _start
+_start:
+ TEST_D_D(ftou, 1, 0x00000000, 0x1733f6c2)
+ TEST_D_D(ftou, 2, 0x00000000, 0x2c9d9cdc)
+ TEST_D_D(ftou, 3, 0xffffffff, 0x56eb7395)
+ TEST_D_D(ftou, 4, 0x79900800, 0x4ef32010)
+ TEST_D_D(ftou, 5, 0x0353f510, 0x4c54fd44)
+
+ TEST_PASSFAIL
+
--
2.41.0
next prev parent reply other threads:[~2023-08-26 16:04 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-26 16:02 [PATCH 00/10] TriCore 1.6.2 insn and bugfixes Bastian Koppelmann
2023-08-26 16:02 ` [PATCH 01/10] tests/tcg/tricore: Bump cpu to tc37x Bastian Koppelmann
2023-08-27 4:23 ` Richard Henderson
2023-08-26 16:02 ` [PATCH 02/10] target/tricore: Implement CRCN insn Bastian Koppelmann
2023-08-27 4:33 ` Richard Henderson
2023-08-26 16:02 ` [PATCH 03/10] target/tricore: Correctly handle FPU RM from PSW Bastian Koppelmann
2023-08-27 4:37 ` Richard Henderson
2023-08-26 16:02 ` Bastian Koppelmann [this message]
2023-08-27 4:50 ` [PATCH 04/10] target/tricore: Implement FTOU insn Richard Henderson
2023-08-27 11:07 ` Bastian Koppelmann
2023-08-27 14:49 ` Richard Henderson
2023-08-27 16:36 ` Bastian Koppelmann
2023-08-27 18:32 ` Richard Henderson
2023-08-27 18:59 ` Bastian Koppelmann
2023-08-26 16:02 ` [PATCH 05/10] target/tricore: Implement ftohp insn Bastian Koppelmann
2023-08-27 4:55 ` Richard Henderson
2023-08-27 7:09 ` Bastian Koppelmann
2023-08-27 14:51 ` Richard Henderson
2023-08-26 16:02 ` [PATCH 06/10] target/tricore: Implement hptof insn Bastian Koppelmann
2023-08-27 4:56 ` Richard Henderson
2023-08-26 16:02 ` [PATCH 07/10] target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0 Bastian Koppelmann
2023-08-27 4:59 ` Richard Henderson
2023-08-26 16:02 ` [PATCH 08/10] target/tricore: Swap src and dst reg for RCRR_INSERT Bastian Koppelmann
2023-08-27 5:06 ` Richard Henderson
2023-08-27 7:18 ` Bastian Koppelmann
2023-08-26 16:02 ` [PATCH 09/10] target/tricore: Replace cpu_*_code with translator_* Bastian Koppelmann
2023-08-27 5:06 ` Richard Henderson
2023-08-26 16:02 ` [PATCH 10/10] target/tricore: Fix FTOUZ being ISA v1.3.1 up Bastian Koppelmann
2023-08-27 5:06 ` Richard Henderson
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