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From: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
To: qemu-devel@nongnu.org
Cc: eduardo@habkost.net, marcel.apfelbaum@gmail.com,
	philmd@linaro.org, wangyanan55@huawei.com, pbonzini@redhat.com,
	berrange@redhat.com, richard.henderson@linaro.org,
	laurent@vivier.eu, palmer@dabbelt.com, alistair.francis@wdc.com,
	bin.meng@windriver.com, liweiwei@iscas.ac.cn,
	dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
	qemu-riscv@nongnu.org
Subject: [RFC PATCH v2 6/6] linux-user: Move qemu_cpu_opts to cpu.c
Date: Mon, 28 Aug 2023 16:45:36 +0800	[thread overview]
Message-ID: <20230828084536.231-7-zhiwei_liu@linux.alibaba.com> (raw)
In-Reply-To: <20230828084536.231-1-zhiwei_liu@linux.alibaba.com>

Make qemu_cpu_opts also works for linux user mode. Notice, currently
qdev monitor is not included in linux user mode. We just output
current enabled extentions for RISC-V(without the hint to print all
properties with -device).

With this patch,
"""
qemu-riscv64 -cpu rv64,help
Enabled extensions:
	rv64_zicbom_zicboz_zicsr_zifencei_zihintpause_zawrs_zfa_zba_zbb_zbc_zbs_sstc_svadu
"""

Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
---
 cpu.c                     | 24 ++++++++++++++++++++++++
 include/exec/cpu-common.h |  2 ++
 linux-user/main.c         | 10 ++++++++++
 softmmu/vl.c              | 24 ------------------------
 target/riscv/cpu.c        |  8 +++++---
 5 files changed, 41 insertions(+), 27 deletions(-)

diff --git a/cpu.c b/cpu.c
index 712bd02684..590d75def0 100644
--- a/cpu.c
+++ b/cpu.c
@@ -47,6 +47,30 @@
 uintptr_t qemu_host_page_size;
 intptr_t qemu_host_page_mask;
 
+QemuOptsList qemu_cpu_opts = {
+    .name = "cpu",
+    .implied_opt_name = "cpu_model",
+    .head = QTAILQ_HEAD_INITIALIZER(qemu_cpu_opts.head),
+    .desc = {
+        { /* end of list */ }
+    },
+};
+
+int cpu_help_func(void *opaque, QemuOpts *opts, Error **errp)
+{
+    const char *cpu_model, *cpu_type;
+    cpu_model = qemu_opt_get(opts, "cpu_model");
+    if (!cpu_model) {
+        return 1;
+    }
+    if (!qemu_opt_has_help_opt(opts)) {
+        return 0;
+    }
+    cpu_type = cpu_type_by_name(cpu_model);
+    list_cpu_props((CPUState *)object_new(cpu_type));
+    return 1;
+}
+
 #ifndef CONFIG_USER_ONLY
 static int cpu_common_post_load(void *opaque, int version_id)
 {
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index b3160d9218..4d385436a5 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -168,4 +168,6 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
 void list_cpus(void);
 void list_cpu_props(CPUState *);
 
+int cpu_help_func(void *opaque, QemuOpts *opts, Error **errp);
+extern QemuOptsList qemu_cpu_opts;
 #endif /* CPU_COMMON_H */
diff --git a/linux-user/main.c b/linux-user/main.c
index 96be354897..c3ef84b1a7 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -362,6 +362,15 @@ static void handle_arg_cpu(const char *arg)
         list_cpus();
         exit(EXIT_FAILURE);
     }
+    QemuOpts *opts = qemu_opts_parse_noisily(qemu_find_opts("cpu"),
+                                             arg, true);
+    if (!opts) {
+        exit(1);
+    }
+    if (qemu_opts_foreach(qemu_find_opts("cpu"),
+                          cpu_help_func, NULL, NULL)) {
+        exit(0);
+    }
 }
 
 static void handle_arg_guest_base(const char *arg)
@@ -720,6 +729,7 @@ int main(int argc, char **argv, char **envp)
     cpu_model = NULL;
 
     qemu_add_opts(&qemu_trace_opts);
+    qemu_add_opts(&qemu_cpu_opts);
     qemu_plugin_add_opts();
 
     optind = parse_args(argc, argv);
diff --git a/softmmu/vl.c b/softmmu/vl.c
index bc30f3954d..d6a395454a 100644
--- a/softmmu/vl.c
+++ b/softmmu/vl.c
@@ -218,15 +218,6 @@ static struct {
     { .driver = "virtio-vga-gl",        .flag = &default_vga       },
 };
 
-static QemuOptsList qemu_cpu_opts = {
-    .name = "cpu",
-    .implied_opt_name = "cpu_model",
-    .head = QTAILQ_HEAD_INITIALIZER(qemu_cpu_opts.head),
-    .desc = {
-        { /* end of list */ }
-    },
-};
-
 static QemuOptsList qemu_rtc_opts = {
     .name = "rtc",
     .head = QTAILQ_HEAD_INITIALIZER(qemu_rtc_opts.head),
@@ -1149,21 +1140,6 @@ static int parse_fw_cfg(void *opaque, QemuOpts *opts, Error **errp)
     return 0;
 }
 
-static int cpu_help_func(void *opaque, QemuOpts *opts, Error **errp)
-{
-    const char *cpu_model, *cpu_type;
-    cpu_model = qemu_opt_get(opts, "cpu_model");
-    if (!cpu_model) {
-        return 1;
-    }
-    if (!qemu_opt_has_help_opt(opts)) {
-        return 0;
-    }
-    cpu_type = cpu_type_by_name(cpu_model);
-    list_cpu_props((CPUState *)object_new(cpu_type));
-    return 1;
-}
-
 static int device_help_func(void *opaque, QemuOpts *opts, Error **errp)
 {
     return qdev_device_help(opts);
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index edcd34e62b..e4318fcc46 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -2229,15 +2229,17 @@ void riscv_cpu_list(void)
 void riscv_cpu_list_props(CPUState *cs)
 {
     char *enabled_isa;
-    RISCVCPU *cpu = RISCV_CPU(cs);
-    RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cpu);
-    ObjectClass *oc = OBJECT_CLASS(mcc);
 
     enabled_isa = riscv_isa_string(RISCV_CPU(cs));
     qemu_printf("Enabled extensions:\n");
     qemu_printf("\t%s\n", enabled_isa);
+#ifndef CONFIG_USER_ONLY
+    RISCVCPU *cpu = RISCV_CPU(cs);
+    RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cpu);
+    ObjectClass *oc = OBJECT_CLASS(mcc);
     qemu_printf("To get all configuable options for this cpu, use"
                 " -device %s,help\n", object_class_get_name(oc));
+#endif
 }
 
 #define DEFINE_CPU(type_name, initfn)      \
-- 
2.17.1



  parent reply	other threads:[~2023-08-28  8:50 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-28  8:45 [RFC PATCH v2 0/6] Add API for list cpu extensions LIU Zhiwei
2023-08-28  8:45 ` [RFC PATCH v2 1/6] cpu: Add new API cpu_type_by_name LIU Zhiwei
2023-08-28  8:45 ` [RFC PATCH v2 2/6] target/riscv: Add API list_cpu_props LIU Zhiwei
2023-08-28  8:45 ` [RFC PATCH v2 3/6] softmmu/vl: Add qemu_cpu_opts QemuOptsList LIU Zhiwei
2023-08-28  8:45 ` [RFC PATCH v2 4/6] target/riscv: Add default value for misa property LIU Zhiwei
2023-08-28 12:26   ` Daniel Henrique Barboza
2023-08-28  8:45 ` [RFC PATCH v2 5/6] target/riscv: Add defalut value for string property LIU Zhiwei
2023-08-28 12:31   ` Daniel Henrique Barboza
2023-08-28  8:45 ` LIU Zhiwei [this message]
2023-08-28 12:35   ` [RFC PATCH v2 6/6] linux-user: Move qemu_cpu_opts to cpu.c Daniel Henrique Barboza
2023-08-28 13:58 ` [RFC PATCH v2 0/6] Add API for list cpu extensions Igor Mammedov
2023-08-28 15:35   ` Daniel Henrique Barboza
2023-08-29  3:02   ` LIU Zhiwei

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