From: "Cédric Le Goater" <clg@kaod.org>
To: qemu-devel@nongnu.org
Cc: "Akihiko Odaki" <akihiko.odaki@daynix.com>,
"Sriram Yagnaraman" <sriram.yagnaraman@est.tech>,
"Jason Wang" <jasowang@redhat.com>,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH 2/2] igb: Add Function Level Reset to PF and VF
Date: Tue, 29 Aug 2023 11:05:29 +0200 [thread overview]
Message-ID: <20230829090529.184438-3-clg@kaod.org> (raw)
In-Reply-To: <20230829090529.184438-1-clg@kaod.org>
From: Cédric Le Goater <clg@redhat.com>
The Intel 82576EB GbE Controller say that the Physical and Virtual
Functions support Function Level Reset. Add the capability to each
device model.
Cc: Sriram Yagnaraman <sriram.yagnaraman@est.tech>
Fixes: 3a977deebe6b ("Intrdocue igb device emulation")
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
hw/net/igb.c | 3 +++
hw/net/igbvf.c | 3 +++
2 files changed, 6 insertions(+)
diff --git a/hw/net/igb.c b/hw/net/igb.c
index e70a66ee038e..b8c170ad9b1a 100644
--- a/hw/net/igb.c
+++ b/hw/net/igb.c
@@ -101,6 +101,7 @@ static void igb_write_config(PCIDevice *dev, uint32_t addr,
trace_igb_write_config(addr, val, len);
pci_default_write_config(dev, addr, val, len);
+ pcie_cap_flr_write_config(dev, addr, val, len);
if (range_covers_byte(addr, len, PCI_COMMAND) &&
(dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
@@ -433,6 +434,8 @@ static void igb_pci_realize(PCIDevice *pci_dev, Error **errp)
}
/* PCIe extended capabilities (in order) */
+ pcie_cap_flr_init(pci_dev);
+
if (pcie_aer_init(pci_dev, 1, 0x100, 0x40, errp) < 0) {
hw_error("Failed to initialize AER capability");
}
diff --git a/hw/net/igbvf.c b/hw/net/igbvf.c
index 07343fa14a89..55e321e4ec20 100644
--- a/hw/net/igbvf.c
+++ b/hw/net/igbvf.c
@@ -204,6 +204,7 @@ static void igbvf_write_config(PCIDevice *dev, uint32_t addr, uint32_t val,
{
trace_igbvf_write_config(addr, val, len);
pci_default_write_config(dev, addr, val, len);
+ pcie_cap_flr_write_config(dev, addr, val, len);
}
static uint64_t igbvf_mmio_read(void *opaque, hwaddr addr, unsigned size)
@@ -266,6 +267,8 @@ static void igbvf_pci_realize(PCIDevice *dev, Error **errp)
hw_error("Failed to initialize PCIe capability");
}
+ pcie_cap_flr_init(dev);
+
if (pcie_aer_init(dev, 1, 0x100, 0x40, errp) < 0) {
hw_error("Failed to initialize AER capability");
}
--
2.41.0
next prev parent reply other threads:[~2023-08-29 9:06 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-29 9:05 [PATCH 0/2] igb: Add FLR support Cédric Le Goater
2023-08-29 9:05 ` [PATCH 1/2] igb: Add a VF reset handler Cédric Le Goater
2023-08-29 11:13 ` Philippe Mathieu-Daudé
2023-08-30 0:36 ` Akihiko Odaki
2023-08-30 10:11 ` Sriram Yagnaraman
2023-08-29 9:05 ` Cédric Le Goater [this message]
2023-08-30 10:12 ` [PATCH 2/2] igb: Add Function Level Reset to PF and VF Sriram Yagnaraman
2023-10-20 4:24 ` Jason Wang
2023-10-20 7:40 ` Cédric Le Goater
2023-10-20 9:41 ` Cédric Le Goater
2023-10-23 3:11 ` Jason Wang
2023-10-23 10:57 ` Akihiko Odaki
2023-10-23 11:28 ` Cédric Le Goater
2023-10-18 12:55 ` [PATCH 0/2] igb: Add FLR support Cédric Le Goater
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