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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id t24-20020a1709064f1800b00992b1c93279sm767926eju.110.2023.08.31.06.37.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Aug 2023 06:37:06 -0700 (PDT) Date: Thu, 31 Aug 2023 15:37:05 +0200 From: Andrew Jones To: Daniel Henrique Barboza Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com Subject: Re: [PATCH RESEND v8 16/20] target/riscv/cpu.c: use cpu_cfg_ext_auto_update() during realize() Message-ID: <20230831-0790fce2c8b7c72401c79d6b@orel> References: <20230824221440.484675-1-dbarboza@ventanamicro.com> <20230824221440.484675-17-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230824221440.484675-17-dbarboza@ventanamicro.com> Received-SPF: pass client-ip=2a00:1450:4864:20::22c; envelope-from=ajones@ventanamicro.com; helo=mail-lj1-x22c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Thu, Aug 24, 2023 at 07:14:36PM -0300, Daniel Henrique Barboza wrote: > Let's change the other instances in realize() where we're enabling an > extension based on a certain criteria (e.g. it's a dependency of another > extension). > > We're leaving icsr and ifencei being enabled during RVG for later - > we'll want to error out in that case. Every other extension enablement > during realize is now done via cpu_cfg_ext_auto_update(). > > The end goal is that only cpu init() functions will handle extension > flags directly via "cpu->cfg.ext_N = true|false". > > Signed-off-by: Daniel Henrique Barboza > Reviewed-by: Alistair Francis > --- > target/riscv/cpu.c | 50 +++++++++++++++++++++++----------------------- > 1 file changed, 25 insertions(+), 25 deletions(-) > Reviewed-by: Andrew Jones