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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id fx4-20020a170906b74400b009887f4e0291sm753665ejb.27.2023.08.31.06.19.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Aug 2023 06:19:45 -0700 (PDT) Date: Thu, 31 Aug 2023 15:19:44 +0200 From: Andrew Jones To: Daniel Henrique Barboza Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com Subject: Re: [PATCH RESEND v8 12/20] target/riscv: deprecate the 'any' CPU type Message-ID: <20230831-0bdd700ffe84ea667111a712@orel> References: <20230824221440.484675-1-dbarboza@ventanamicro.com> <20230824221440.484675-13-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230824221440.484675-13-dbarboza@ventanamicro.com> Received-SPF: pass client-ip=2a00:1450:4864:20::641; envelope-from=ajones@ventanamicro.com; helo=mail-ej1-x641.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Thu, Aug 24, 2023 at 07:14:32PM -0300, Daniel Henrique Barboza wrote: > The 'any' CPU type was introduced in commit dc5bd18fa5725 ("RISC-V CPU > Core Definition"), being around since the beginning. It's not an easy > CPU to use: it's undocumented and its name doesn't tell users much about > what the CPU is supposed to bring. 'git log' doesn't help us either in > knowing what was the original design of this CPU type. > > The closest we have is a comment from Alistair [1] where he recalls from > memory that the 'any' CPU is supposed to behave like the newly added > 'max' CPU. He also suggested that the 'any' CPU should be removed. > > The default CPUs are rv32 and rv64, so removing the 'any' CPU will have > impact only on users that might have a script that uses '-cpu any'. > And those users are better off using the default CPUs or the new 'max' > CPU. > > We would love to just remove the code and be done with it, but one does > not simply remove a feature in QEMU. We'll put the CPU in quarantine > first, letting users know that we have the intent of removing it in the > future. > > [1] https://lists.gnu.org/archive/html/qemu-devel/2023-07/msg02891.html > > Signed-off-by: Daniel Henrique Barboza > Reviewed-by: Alistair Francis > --- > docs/about/deprecated.rst | 12 ++++++++++++ > target/riscv/cpu.c | 5 +++++ > 2 files changed, 17 insertions(+) > > diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst > index 92a2bafd2b..4ced7427ac 100644 > --- a/docs/about/deprecated.rst > +++ b/docs/about/deprecated.rst > @@ -371,6 +371,18 @@ QEMU's ``vhost`` feature, which would eliminate the high latency costs under > which the 9p ``proxy`` backend currently suffers. However as of to date nobody > has indicated plans for such kind of reimplementation unfortunately. > > +RISC-V 'any' CPU type ``-cpu any`` (since 8.2) > +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ > + > +The 'any' CPU type was introduced back in 2018 and has been around since the > +initial RISC-V QEMU port. Its usage has always been unclear: users don't know > +what to expect from a CPU called 'any', and in fact the CPU does not do anything > +special that aren't already done by the default CPUs rv32/rv64. ^ isn't > + > +After the introduction of the 'max' CPU type RISC-V now has a good coverage ^ , > +of generic CPUs: rv32 and rv64 as default CPUs and 'max' as a feature complete > +CPU for both 32 and 64 bit builds. Users are then discouraged to use the 'any' > +CPU type starting in 8.2. > > Block device options > '''''''''''''''''''' > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 8dc85f75bb..913b64264f 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -1522,6 +1522,11 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) > RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(dev); > Error *local_err = NULL; > > + if (object_dynamic_cast(OBJECT(dev), TYPE_RISCV_CPU_ANY) != NULL) { > + warn_report("The 'any' CPU is deprecated and will be " > + "removed in the future."); > + } > + > cpu_exec_realizefn(cs, &local_err); > if (local_err != NULL) { > error_propagate(errp, local_err); > -- > 2.41.0 > > Besides the text edits, Reviewed-by: Andrew Jones